THS4041, THS4042

165MHz CSTABLE HIGHSPEED AMPLIFIERS

SLOS237B− MAY 1999 − REVISED FEBRUARY 2000

16

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

driving a capacitive load

Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are

taken. The first is to realize that the THS404x has been internally compensated to maximize its bandwidth and

slew rate performance. Typically when the amplifier is compensated in this manner, capacitive loading directly

on the output will decrease the device’s phase margin, leading to high frequency ringing or oscillations.

However, the THS404x has added internal circuitry that senses a capacitive load and adds extra compensation

to the internal dominant pole. As the capacitive load increases, the amplifier remains stable. But, it is not

uncommon to see a small amount of peaking in the frequency response. There are typically two ways to

compensate for this. The first is to simply increase the gain of the amplifier. This helps by increasing the phase

margin to keep peaking minimized. The second is to place an isolation resistor in series with the output of the

amplifier, as shown in Figure 65. A minimum value of 20

Ω should work well for most applications. For example,

in 75-

Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance loading

and provides the proper line impedance matching at the source end. For more information about driving

capacitive loads, refer to the Output Resistance and Capacitance section of the Parasitic Capacitance in Op

Amp Circuits Application Report (literature number: SLOA013).

+

_

THS404x

CLOAD

1.3 k

Ω

Input

Output

1.3 k

Ω

20

Ω

Figure 65. Driving a Capacitive Load for Extra Stability

offset nulling

The THS404x has very low input offset voltage for a high-speed amplifier. However, if additional correction is

required, an offset nulling function has been provided on the THS4041. The input offset can be adjusted by

placing a potentiometer between terminals 1 and 8 of the device and tying the wiper to the negative supply. This

is shown in Figure 66.

_

+

THS4041

VCC −

VCC+

0.1

µF

0.1

µF

10 k

Ω

Figure 66. Offset Nulling Schematic