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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TAS5713 датащи(PDF) 11 Page - Texas Instruments |
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TAS5713 датащи(HTML) 11 Page - Texas Instruments |
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11 / 72 page  t h1 t su1 t (edge) t su2 t h2 SCLK (Input) LRCLK (Input) SDIN T0026-04 t r t f TAS5713 www.ti.com SLOS637A – DECEMBER 2009 – REVISED AUGUST 2010 SERIAL AUDIO PORTS SLAVE MODE over recommended operating conditions (unless otherwise noted) TEST PARAMETER MIN TYP MAX UNIT CONDITIONS fSCLKIN Frequency, SCLK 32 × fS, 48 × fS, 64 × fS CL = 30 pF 1.024 12.288 MHz tsu1 Setup time, LRCLK to SCLK rising edge 10 ns th1 Hold time, LRCLK from SCLK rising edge 10 ns tsu2 Setup time, SDIN to SCLK rising edge 10 ns th2 Hold time, SDIN from SCLK rising edge 10 ns LRCLK frequency 8 48 48 kHz SCLK duty cycle 40% 50% 60% LRCLK duty cycle 40% 50% 60% SCLK SCLK rising edges between LRCLK rising edges 32 64 edges t(edge) SCLK LRCLK clock edge with respect to the falling edge of SCLK –1/4 1/4 period tr/tf Rise/fall time for SCLK/LRCLK 8 ns Figure 2. Slave-Mode Serial Data-Interface Timing Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TAS5713 |
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