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L99LD01 датащи(PDF) 19 Page - STMicroelectronics |
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L99LD01 датащи(HTML) 19 Page - STMicroelectronics |
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19 / 69 page ![]() DocID025319 Rev 3 19/69 L99LD01 Functional description 68 pins G1 and G2 to zero voltage and the event is registered in the status register of the SPI interface and read by the micro. In case of LED overvoltage, immediately after stopping the device, an internal resistor is applied between pin ISENSE+ and GND trough the switch “C_disch” (see Figure 1), in order to discharge capacitors C1 and C4, avoiding LED flashing when the converter restarts. Any LED_OV event will be written in the GSB (Global Status Byte) bit 7 and also in the SR1 (Status Register 1) bit 18. 2.2.4 Battery overvoltage shutdown In case supply voltage applied to the VS pin rises above a maximum voltage threshold, sensed by a resistor divider attached at pin INP_OV, the converter is switched off immediately, forcing outputs pin G1 and G2, to zero voltage. This prevents a LED over current in case of load-dump. If, following the input overvoltage event, the battery voltage decreases under a second threshold, lower than the former, the converter starts again. 2.2.5 Regulators thermal shut down Both voltage regulators inside the chip are provided with over temperature detection circuits. If VR1 reaches its maximum temperature, VR1 will be switched off. After that, the behavior of the device depends on the application (see Section 2.2.1: LED current adjust and temperature control). If instead, is VR2 to reach its maximum temperature (typ 175 °C), then the device will be completely switched off (VCC1 and VCC2 =0). Only the internal temperature monitoring of VCC2 remains alive and when the temperature falls down under a second lower temperature threshold (150 °C typ.), the device tries to restart again. 2.2.6 Reset The NRES pin (active low), generates a reset signal for the microcontroller. An external pull up resistor (typ. 100 k) maintain normally high the voltage at pin NRES (see Figure 32). Following a power up condition, the NRES pin is forced low while the voltage provided by regulator 1 (VCC1) is below an internal fixed threshold VCC1_TH of typ 4.5 V. After VCC1 has reached the above mentioned internal threshold, NRES voltage is kept low for a fixed default time of 2 ms; after that, the NRES pin will be released reaching the normal high state. However, this time can be externally extended by an additional capacitance connected between NRES and GND (see C6 in the application circuits), which is charged by the external pull-up. Depending on the reset-input-threshold of the µP (UTR), the required capacitance for a typical TRD can be calculated as follows: RPU is the pull up resistor (value in ohm) C6 T – RD R PU lg 1 U TR VCC 1 ⁄ – () ⋅ () ⁄ = |
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