L99LD01 datasheet(12/69 Pages) STMICROELECTRONICS

12 / 69 page

Functional description

L99LD01

12/69

DocID025319 Rev 3

The following Figure 4, Figure 5 (a), (b) and Figure 6 (a) show the behavior of the device

and NRES during start-up in case of normal VS ramp up or in case of VCC1 failures (VCC1 fail

or reset under voltage), both with microcontroller and standalone. Figure 6 (b) and Figure 7

show the behavior at VS ramp down fast and slow respectively.

Limp home VCC1 on 

limp home VCC1 off

3 consecutive WD timeouts

(microcontroller is supplied by

VCC1)

Power on reset OR toggling

of EN pin

Fail Safe bit = 0

WD_Fail bit = 0

Reset bit = 1

3 consecutive WD timeouts

(microcontroller is supplied by

another VREG)

Read and clear Status1

AND WD trigger

Fail Safe bit = 0

WD_Fail bit = 0

Start up

limp home

VCC1 off

VCC1 < VCC1_FAIL during start up

for more than 4 ms

Power on reset

Failsafe bit = 0

Vcc1_Sc bit = 0

Reset bit = 1

VCC1 < VCC1_FAIL during start up

for more than 4 ms

(microcontroller supplied by

another VREG)

Read and clear Status1

AND WD trigger OR

Toggling of EN pin

Failsafe bit = 0

Vcc1_Sc bit = 0

Vcc1_Fail = 0

VCC1 < VCC1_TH for more than

100 ms during start up AND

VS >VSMIN

Power on reset OR toggling

of EN pin

Fail Safe bit = 0

Vcc1_Sc bit = 0

Reset bit = 1

VCC1 < VCC1_TH for more than

100 ms during start up AND

VS >VSMIN (microcontroller

supplied by another VREG)

Read and clear Status1

AND WD trigger

Fail Safe bit = 0

Vcc1_Sc bit = 0

Any state except normal

mode standalone

 limp

home VCC1 off

VCC1 over temperature

Read and clear Status1

AND WD trigger

Fail Safe bit = 0

Vcc1_Ot bit = 0

Normal mode



SW limp home

Software limp home is activated

Reset Lh_Sw bit AND

WD trigger

Fail Safe bit = 0

Lh_Sw_St = 0

Table 2. Limp home mode: recovery paths (continued)

Transition

Root cause

Action to get back to

normal mode

Response in the

next SPI command

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