L99LDLH32 datasheet(29/142 Pages) STMICROELECTRONICS

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DS12879 Rev 6

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L99LDLH32

Functional description

141

devices can be configured (through FTP only) by PHASE_DEV bits (3-bits - see FTP/RAM

memory map, Chapter 7).

The internal PWM clock oscillator can be reset by PWM_SYNC bit (see RAM memory map,

Chapter 7

) in order to start the PWM period at a known phase relation.

Dimming with direct input in Fail Safe/Stand Alone Mode

The L99LDLH32 features the channel output PWM dimming through direct input control.

The Direct Input controls the output channels as per FTP setting (see Table 3: Output

channel assignment to DIN

There is 1 configuration bit (PWM_FS_ALLx_EN - see FTP/RAM memory map, Chapter 7)

for enabling internal PWM dimming in Stand Alone / Fail Safe mode.

The PWM signal is deactivated by related DIN: if DIN = 0, the outputs are off; otherwise the

outputs follow internal PWM signal.

In Fail Safe / Stand Alone mode, an alternative duty cycle for DIN function group can be set

by an additional 8-bit register (PWM_DUTY_ALLx_ALT - see FTP/RAM memory map,

Chapter 7

).This alternative duty cycle can be activated by dedicated pin PWM_DC_1/2.

If this pin is set at “1”, the alternative register values will be considered, otherwise, the

default register PWM_DUTY_ALLx will be the reference.

The channel PWM control concept in Fail Safe / Stand Alone Mode is illustrated in the

following flow chart.

Table 6. PWM phase shift (in Consumer mode)

PHASE_DEV [2÷0]

PWM_PHASE_SHIFT [µs]

bit 2

bit 1

bit 0

000

001

010

011

100

101

110

111

105

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