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PCM5121 датащи(PDF) 49 Page - Texas Instruments |
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PCM5121 датащи(HTML) 49 Page - Texas Instruments |
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49 / 121 page ![]() 49 PCM5121, PCM5122 www.ti.com SLAS763C – AUGUST 2012 – REVISED OCTOBER 2018 Product Folder Links: PCM5121 PCM5122 Submit Documentation Feedback Copyright © 2012–2018, Texas Instruments Incorporated Below are details of the register locations, as well as the nomenclature for the table of registers found at the end of this document. Table 35. PLL Registers DIVIDER FUNCTION BITS PLLE PLL enable Page 0, Register 4, D(0) PPDV PLL P Page 0, Register 20, D(3:0) PJDV PLL J Page 0, Register 21, D(5:0) PDDV PLL D Page 0, Register 22, D(5:0) Page 0, Register 23, D(7:0) PRDV PLL R Page 0, Register 24, D(3:0) Table 36. PLL Configuration Recommendations COLUMN DESCRIPTION fS (kHz) Sampling frequency RSCK Ratio between sampling frequency and SCK frequency (SCK frequency = RSCK × sampling frequency) SCK (MHz) System master clock frequency at SCK input (pin 20) PLL VCO (MHz) PLL VCO frequency as PLLCK in Figure 63 P One of the PLL coefficients in Equation 3 PLL REF (MHz) Internal reference clock frequency which is produced by SCK / P M = K * R The final PLL multiplication factor computed from K and R as described in Equation 3 K = J.D One of the PLL coefficients in Equation 3 R One of the PLL coefficients in Equation 3 PLL fS Ratio between fS and PLL VCO frequency (PLL VCO / fS) DSP fS Ratio between audio processor operating clock rate and fS (PLL fS / NMAC) NMAC The audio processor clock divider value in Table 34 DSP CLK (MHz) The audio processor operating frequency as DSPCK in Figure 63 MOD fS Ratio between DAC operating clock frequency and fS (PLL fS / NDAC) MOD f (kHz) DAC operating frequency as DACCK in Figure 63 NDAC DAC clock divider value in Table 34 DOSR OSR clock divider value in Table 34 for generating OSRCK in Figure 63. DOSR must be chosen so that MOD fS / DOSR = 16 for correct operation. NCP NCP (negative charge pump) clock divider value in Table 34 CP f Negative charge pump clock frequency (fS × MOD fS / NCP) % Error Percentage of error between PLL VCO / PLL fS and fS (mismatch error). • This number is typically zero but can be non-zero especially when K is not an integer (D is not zero). • This number may be non-zero only when the PCM512x acts as a master. |
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