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LP2992IM5-5.0/NOPB датащи(PDF) 26 Page - Texas Instruments |
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LP2992IM5-5.0/NOPB датащи(HTML) 26 Page - Texas Instruments |
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26 / 43 page ![]() 7.2.3 Application Curves Figure 7-3. Load Transient Response for Legacy Chip 20 s/div 0 20 40 60 80 100 120 140 150 3.1 -300 3.16 -250 3.22 -200 3.28 -150 3.34 -100 3.4 -50 3.46 0 3.52 50 3.58 100 3.64 150 3.7 200 3.76 250 3.82 300 3.88 350 V0 = 3.3 V Cbyp = 10 nF IL = 150 mA VO IL dI/dt = 1 A/μ Figure 7-4. Load Transient for New Chip Figure 7-5. Load Transient Response for Legacy Chip 20 s/div 0 20 40 60 80 100 120 140 150 3.1 -300 3.16 -250 3.22 -200 3.28 -150 3.34 -100 3.4 -50 3.46 0 3.52 50 3.58 100 3.64 150 3.7 200 3.76 250 3.82 300 3.88 350 V0 = 3.3 V Cbyp = 0 nF IL = 150 mA VO IL dI/dt = 1 A/μ Figure 7-6. Load Transient Response for New Chip Figure 7-7. Line Transient Response for Legacy Chip 20 s/div 0 40 80 120 160 200 240 280 3.27 3 3.29 3.5 3.31 4 3.33 4.5 3.35 5 3.37 5.5 3.39 6 3.41 6.5 VO VIN VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 1 mA, dV/dt = 1 V/μ Figure 7-8. Line Transient Response for New Chip LP2992 SNVS171L – NOVEMBER 2001 – REVISED FEBRUARY 2025 www.ti.com 26 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: LP2992 |
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