STA1080 datasheet(35/127 Pages) STMICROELECTRONICS

35 / 127 page

DS13319 Rev 2

35/127

STA108x, STA109x

Signal description

126

SDRAM_ADD_3

GPIO61

W10

VDD_IO SDR SDRAM. Address line 3.

SDRAM_ADD_4

GPIO60

V11

VDD_IO SDR SDRAM. Address line 4.

SDRAM_ADD_5

GPIO59

W11

VDD_IO SDR SDRAM. Address line 5.

SDRAM_ADD_6

GPIO58

V12

VDD_IO SDR SDRAM. Address line 6.

SDRAM_ADD_7

GPIO57

W12

VDD_IO SDR SDRAM. Address line 7.

SDRAM_ADD_8

GPIO56

V13

VDD_IO SDR SDRAM. Address line 8.

SDRAM_ADD_9

GPIO55

W13

VDD_IO SDR SDRAM. Address line 9.

SDRAM_BA_0

GPIO51

VDD_IO SDR SDRAM. Bank address 0 line.

SDRAM_BA_1

GPIO50

VDD_IO SDR SDRAM. Bank address 1 line.

SDRAM_CASn

GPIO82

VDD_IO SDR SDRAM. Column address strobe.

SDRAM_CKE

GPIO87

V15

VDD_IO SDR SDRAM. Clock enable.

SDRAM_CLK

GPIO89

W15

VDD_IO SDR SDRAM. Clock signal.

SDRAM_CS0n

GPIO86

VDD_IO SDR SDRAM. Chip select 0.

SDRAM_CS1n

GPIO28

GPIO136(1)

M19

U17

VDD_IO SDR SDRAM. Chip select 1.

SDRAM_Data_0

GPIO80

I/O

VDD_IO SDR SDRAM. Data line 0.

SDRAM_Data_1

GPIO79

I/O

VDD_IO SDR SDRAM. Data line 1.

SDRAM_Data_10

GPIO70

T19

I/O

VDD_IO SDR SDRAM. Data line 10.

SDRAM_Data_11

GPIO69

U19

I/O

VDD_IO SDR SDRAM. Data line 11.

SDRAM_Data_12

GPIO68

U18

I/O

VDD_IO SDR SDRAM. Data line 12.

SDRAM_Data_13

GPIO67

W18

I/O

VDD_IO SDR SDRAM. Data line 13.

SDRAM_Data_14

GPIO66

V19

I/O

VDD_IO SDR SDRAM. Data line 14.

SDRAM_Data_15

GPIO65

V18

I/O

VDD_IO SDR SDRAM. Data line 15.

SDRAM_Data_16(1)

GPIO137(1)

I/O

VDD_IO SDR SDRAM. Data line 16.

SDRAM_Data_17(1)

GPIO138(1)

I/O

VDD_IO SDR SDRAM. Data line 17.

SDRAM_Data_18(1)

GPIO139(1)

I/O

VDD_IO SDR SDRAM. Data line 18.

SDRAM_Data_19(1)

GPIO140(1)

I/O

VDD_IO SDR SDRAM. Data line 19.

SDRAM_Data_2

GPIO78

I/O

VDD_IO SDR SDRAM. Data line 2.

SDRAM_Data_20(1)

GPIO141(1)

I/O

VDD_IO SDR SDRAM. Data line 20.

SDRAM_Data_21(1)

GPIO142(1)

I/O

VDD_IO SDR SDRAM. Data line 21.

SDRAM_Data_22(1)

GPIO143(1)

I/O

VDD_IO SDR SDRAM. Data line 22.

SDRAM_Data_23(1)

GPIO144(1)

I/O

VDD_IO SDR SDRAM. Data line 23.

SDRAM_Data_24(1)

GPIO147(1)

I/O

VDD_IO SDR SDRAM. Data line 24.

SDRAM_Data_25(1)

GPIO148(1)

I/O

VDD_IO SDR SDRAM. Data line 25.

Table 12. Memory signals (continued)

Name

GPIOs

Balls

DIR

Power

Domain

Description

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