L9924L datasheet(78/84 Pages) STMICROELECTRONICS

78 / 84 page

SPI interface

L9924L

78/84

DocID028840 Rev 3

Read config register (0x1F)

7C0000 0600F1

GSW:

– CP-LOW (charge pump not yet activated)

– Key active

DATA

– LIN not available

– 24 V not supported

– Silicon revision = 0xF

–Device ID = 1

Write 0x800 to system

operation register (0x03):

charge pump enable

8C4800 064000

GSW:

– CP-LOW (charge pump not yet activated)

– Key active

Read And Clear general

status register (0x12)

4840A5 060100

GSW:

– CP-LOW (charge pump not yet activated)

– Key active

DATA: CP-LOW (still set because of deglitch time)

Read general status register

(0x12

484000 020000

GSW: Key active

CP-LOW cleared because of previous clear

command and previous charge pump activation

Write 0x6C to DFM setup

High side – 400Hz

90406C 020000

GSW: Key active

DATA

– Polarity 1 (default)

– DFM OFF (0x0F)

Write 0x3E to DFM duty cycle

10%

94403E 020000

GSW: Key active

DATA: 0

Write 0x1000 to drv settings

CSA enable

45000

020014

GSW: Key active

DATA

– L_LS_ENABLE (default)

– LHC_LS_ENABLE (default)

Read phase register (0x13)

4C0000 02D800

GSW:

– Key active

– Phase notification

DATA: 0x1800=6144 – First phase -> Discard

Wait 22 ms (4 phase periods

plus a 2 ms margin)

Read phase register (0x13)

4C0000 029138

GSW:

– Key active

– Phase notification

DATA

– Phase regulation request (bit 12)

– 0x138=312 -> 19.969 ms

~20 ms correspond to 4 periods

Table 61. SPI sequence examples (continued)

Operation

MOSI

MISO

Comment

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