8.2.1 Design Requirements

8.2.1.1 Power Considerations

Ensure the desired supply voltage is within the range specified in the Recommended Operating Conditions.

The supply voltage sets the device's electrical characteristics of the device as described in the Electrical

Characteristics section.

The positive voltage supply must be capable of sourcing current equal to the total current to be sourced by all

outputs of the CD74ACT157 plus the maximum static supply current, ICC, listed in the Electrical Characteristics,

and any transient current required for switching. The logic device can only source as much current that is

provided by the positive supply source. Ensure the maximum total current through VCC listed in the Absolute

Maximum Ratings is not exceeded.

The ground must be capable of sinking current equal to the total current to be sunk by all outputs of the

CD74ACT157 plus the maximum supply current, ICC, listed in the Electrical Characteristics, and any transient

current required for switching. The logic device can only sink as much current that can be sunk into its ground

connection. Ensure the maximum total current through GND listed in the Absolute Maximum Ratings is not

exceeded.

The CD74ACT157 can drive a load with a total capacitance less than or equal to 50pF while still meeting all of

the data sheet specifications. Larger capacitive loads can be applied; however, it is not recommended to exceed

50pF.

The CD74ACT157 can drive a load with total resistance described by RL ≥ VO / IO, with the output voltage and

current defined in the Electrical Characteristics table with VOH and VOL. When outputting in the HIGH state, the

output voltage in the equation is defined as the difference between the measured output voltage and the supply

voltage at the VCC pin.

Total power consumption can be calculated using the information provided in the CMOS Power Consumption

and Cpd Calculation application note.

Thermal increase can be calculated using the information provided in the Thermal Characteristics of Standard

Linear and Logic (SLL) Packages and Devices application note.

CAUTION

The maximum junction temperature, TJ(max) listed in the Absolute Maximum Ratings, is an additional

limitation to prevent damage to the device. Do not violate any values listed in the Absolute Maximum

Ratings. These limits are provided to prevent damage to the device.

CD74ACT157

SCHS340D – MARCH 2003 – REVISED JULY 2025

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