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L9300 датащи(PDF) 152 Page - STMicroelectronics

номер детали L9300
подробное описание детали  Automotive flexible U-chip for braking and transmission
PDF  178 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9300 датащи(HTML) 152 Page - STMicroelectronics

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17
Functional safety
17.1
Power supply
17.1.1
VDD3(4) Regulator
Under Voltage Comparator
Voltage monitor compares regulator feedback value with a reference threshold, independent from the regulator
one, to understand if a fault condition is present on regulator output. To prevent latent fault, an analog self-test is
implemented in the monitor circuitry: comparator inputs are choppered by a diagnostic clock and the output of the
comparator is XORed with diagnostic clock itself (see next figure); in case comparator is not able to toggle its
output will start toggling the following diagnostic clock and setting the fault. Self-test is enabled by SPI bit and is
kept running until the enable bit is cleared; in case of fault same actions as under voltage fault are taken leading
to ASIC reset, setting uv fault bit plus a self test fault bit to let the user know, after recovering from RES condition,
that the fault has been generated during self test procedure.
Over Voltage Comparator
Voltage monitor compares regulator feedback value with a reference threshold, independent from the regulator
one, to understand if a fault condition is present on regulator output. To prevent latent fault an analog self-test is
implemented in the monitor circuitry: comparator inputs are choppered by a diagnostic clock and the output of the
comparator is XORed with diagnostic clock itself (see next figure); in case comparator is not able to toggle its
output, it will start toggling the following diagnostic clock and setting the fault. Self-test is enabled by SPI bit and is
kept running until the enable bit is cleared; in case of fault, the same actions as overvoltage fault (setting OV fault
bit and a Selftest fault bit) are taken leading to device reset, and warn, after recovering from RES condition, that
the fault has been generated during self-test procedure.
Figure 64. voltage monitor self test basic implementation
No fault
Fault condition
GADG2407171510PS
L9300
Functional safety
DS12258 - Rev 5
page 152/178



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