L9679E datasheet(83/127 Pages) STMICROELECTRONICS

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To reject glitches on decoded signal that could compromise message decoding a deglitch filter is implemented

after current transition detection. This means that a delay is present until the threshold crossing is detected by

decoder. The filter time can be configured in 15 steps by PSI5FILT bits through the Remote Sensor Configuration

Each RSDRx register is updated after a certain delay (TWRITE_EN_DELAY) from the end of relative sensor

message. All the bits inside the register itself are simultaneously updated upon reception of the remote sensor

message to prevent partial frame data from being sampled via the SPI interface. After the data for a given

channel is read via the SPI interface, subsequent requests for data from this channel will result in an error

response.The remote sensor interface is also able to detect faults occurring on the sensor interface. The remote

sensor data register (RSDRx) will report multiple fault flags.

When the number of bits decoded is incorrect (either too many or too few), a bit error is indicated. When any bit

error is detected (bit time, too many bits, too few bits), the decoder will revert to the minimum bit time of the

selected range and the message is discarded.

Error bit INVALID is an OR-ed combination of the following errors:

•

Start bit error outside of selected operating range

•

Data length error or stop bit error

•

Parity error of received remote sensor message

•

Bit time error (a data bit edge is not received inside the expected time window)

Synchronous mode

The received message data is stored in input data registers that are read out by the microcontroller via the SPI

interface. For PSI-5 synchronous mode, three data registers per channel are used to store remote sensor

messages received during time slots 1, 2, and 3 respectively.

In case of a fault related to a channel, the fault bit is loaded in all the 3 time slot register and has the priority, so

the fault overwrites valid data.

To allow the sampling synchronization of remote sensor data with the software in the microcontroller, the remote

sensor interface block includes sync-pulse circuitry to signal initiation of sampling in the remote sensor. The sync-

pulse is output to the remote sensors in the form of an increased voltage level on the RSUx pins when sampling is

to be conducted. The higher voltage level required for the sync-pulse is sourced from the VSYNC pin. Pulse

shaping is used to limit the slew rate of the pulses to reduce EMI. Feedback protection is provided to prevent fault

conditions on one channel from affecting the others during sync-pulse generation. The microcontroller schedules

the activation of the sync pulses to the four channels by providing a periodic signal to the SATSYNC pin. When a

rising edge is detected on SATSYNC pin, the remote sensor interface block outputs sync pulses on output

channels RSUx in sequence to reduce the average current inrush to the remote sensors as shown in

Figure 23. Remote sensor synchronization pulses. The voltage source in the remote sensor interface block can

source and sink current and is used to discharge the bus capacitance at the end of the sync pulse. The pull down

device used to sink current is current limited.

L9679E

Remote sensor interface

DS12485 - Rev 8

page 83/127

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