Outputs (LVPECL or LVDS)

CDCE421A

SCAS873 – APRIL 2009..................................................................................................................................................................................................... www.ti.com

Table 4 summarizes all valid programming commands for the CDCE421A.

Table 4. CDCE421A Programming Commands

SDATA

FUNCTION

001100

Enter Programming Mode (State 1

→State 2); bits must be sent in the specified order with the

specified timing. Otherwise a time-out occurs.

111011

Enter Register Readback Mode; bits must be sent in the specified order with the specified timing.

Otherwise a time-out occurs.

000 xxxx xxxx

Write to Word0 (State 2)(1)(2)(3)

100 xxxx xxxx

Write to Word1 (State 2)(1)(2)(3)

010 xxxx xxxx

Write to Word2 (State 2)(1)(2)(3)

110 xxxx xxxx

Write to Word3 (State 2)(1)(2)(3)

001 xxxx xxxx

Write to Word4 (State 2)(1)(2)(3)

101 xxxx xxxx

Write to Word5 (State 2)(1)(2)(3)

111 xxxx xxxx

State Machine Jump: All other patterns not defined as below cause Exit to Normal Mode

111 1111 0000

Jump: Enter EEPROM programming without EEPROM lock (State2

→State 3)

111 0101 0101

Jump: Enter EEPROM programming with EEPROM lock (State 2

→State 4)

111 0000 0000

Jump: Exit EEPROM programming (State 3 or State 4

→State 1)

(1)

Each rising edge causes a bit to be latched.

(2)

In between the bits, some longer time delays can occur, but these delays have no effect on the data.

(3)

A Write to WordX instruction is expected to be 10 bits long. After the tenth bit, the respective word is latched, and its effect can be

observed as a look-ahead function.

The CDCE421A device has two sets of output drivers, LVPECL and LVDS, where the outputs are wire-ORed

together. Only one output can be selected at a given time; the other output goes to a high-impedance (Hi-Z)

state.

If the device is configured for LVPECL outputs, the output buffers go to Hi-Z ,and the termination resistors

determine the state of the output (LVPECLP = LVPECLN = Hi-Z) in the device disable mode (CE = L). If the

device is configured in LVDS mode, the outputs go to a Hi-Z state if the device is disabled (CE = L).

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