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CDCE706PW датащи(PDF) 32 Page - Texas Instruments

номер детали CDCE706PW
подробное описание детали  PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER
PDF  46 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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CDCE706PW датащи(HTML) 32 Page - Texas Instruments

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CDCE706
SCAS815I – OCTOBER 2005 – REVISED NOVEMBER 2008 ........................................................................................................................................... www.ti.com
Figure 26. Snapshot of Cycle-to-Cycle Jitter
Period jitter (tjit(per)) is the deviation in cycle time of a clock signal with respect to the ideal period (1/fO) over a
random sample of cycles. In reference to a PLL, period jitter is the worst-case period deviation from the ideal that
would ever occur on the PLL outputs. This is also referred to as short-term jitter.
Figure 27. Snapshot of Period Jitter
Phase jitter (tjit(phase)) is the long-term variation of the clock signal. It is the cumulative deviation in t(Θ) for a
controlled edge with respect to a t(
Θ) mean in a random sample of cycles. Phase jitter, time-interval error (TIE),
and wander are used in literature to describe long-term variation in frequency. As of ITU-T: G.810, wander is
defined as phase variation at rates less than 10 Hz, whereas jitter is defined as phase variation greater than
10 Hz. The measurement interval must be long enough to gain a meaningful result. Wander can be caused by
temperature drift, aging, supply-voltage drift, etc.
32
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