Buffer

Sel

M

U

X

P-Div(0)Output

P-Div(1)Output

P-Div(2)Output

P-Div(3)Output

P-Div(4)Output

P-Div(5)Output

Yx

S1

P-DividerSelect

InversionSelect

Slew-RateControl

LowSelect

Enable/Disable

(Optional; All

OutputsLow

or3-State)

V

/V

CCOUT1

CCOUT2

B0338-01

Divby3

Inverting

SlewRate

LowSelect

Enable/Disable

Clock

T0410-01

CDCE706

SCAS815I – OCTOBER 2005 – REVISED NOVEMBER 2008 ........................................................................................................................................... www.ti.com

Figure 24. Block Diagram of Output Architecture

Figure 25. Example for Output Waveforms

All output settings are programmable via SMBus:

• Enable, disable, low-state via external control pins S0 and S1 → byte 10, bits[3:0]

• Enable or disable-to-low → bytes 19 to 24, bit[3]

• Inverting/noninverting → bytes 19 to 24, bit[6]

• Slew-rate control → bytes 19 to 24, bits[5:4]

• Output swing → external pins V

CCOUT1 (pin 14) and VCCOUT2 (pin 18)

30

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