Sr

A1

1

0

0

1

0

A0

R

A

0

0

0

0

D11 D10 D9

D8

A

D7

D6...D1

D0

N

P

S

A1

1

0

0

1

0

A0

W

A

SD

C2

C1

C0 PD1 PD0 X

X

A

From Master to Slave

A = Acknowledge (SDA low)

N = Not acknowledge (SDA high)

S = Start condition

P = Stop condition

Sr = Repeated Start condition

W = 0 (write)

R = 1 (read)

From Slave to Master

Write-Addressing Byte

Command Byte

ADC Power-Down Mode

ADC Sampling Mode

ADC Converting Mode

ADC Power-Down Mode

(depending on power-down selection bits)

Read-Addressing Byte

2 x (8 bits + ack/nack)

See Note (1)

NOTE: (1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use Repeated Start.

ADS7828-Q1

www.ti.com

SBAS456B – DECEMBER 2008 – REVISED JANUARY 2016

7.4.4 Reading Data

Data can be read from the ADS7828 by read addressing the part (LSB of address byte set to 1) and receiving

the transmitted bytes. Converted data can be read from the ADS7828 only after a conversion has been initiated

as described in the preceding section.

Each 12-bit data word is returned in two bytes (see Figure 17), where D11 is the MSB of the data word, and D0

is the LSB. Byte 0 is sent first, followed by byte 1.

Figure 17. Reading Data

MSB

6

5

4

3

2

1

LSB

Byte 0

0

0

0

0

D11

D10

D9

D8

Byte 1

D7

D6

D5

D4

D3

D2

D1

D0

7.4.5 Reading in Fast or Standard (F/S) Mode

Figure 18 shows the interaction between the master and the slave ADS7828 in fast or standard (F/S) mode. At

the end of reading conversion data, the ADS7828 can be issued a repeated Start condition by the master to

secure bus operation for subsequent conversions of the ADC. This would be the most efficient way to perform

continuous conversions.

Figure 18. Typical Read Sequence in F/S Mode

7.4.6 Reading in High-Speed (HS) Mode

High Speed (HS) mode is fast enough that codes can be read out one at a time. In HS mode, there is not

enough time for a single conversion to complete between the reception of a repeated Start condition and the

read-addressing byte, so the ADS7828 stretches the clock after the read-addressing byte has been fully

received, holding it low until the conversion is complete.

See Figure 19 for a typical read sequence for HS mode. Included in the read sequence is the shift from F/S to

HS modes. It may be desirable to remain in HS mode after reading a conversion; to do this, issue a repeated

Start instead of a Stop at the end of the read sequence, since a Stop causes the part to return to F/S mode.

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