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−21

−20.5

−20

−19.5

−32768

−16384

0

16384

32768

Code

13

13.5

14

14.5

15

−32768

−16384

0

16384

32768

Code

t − Time − 50 ns/div

t − Time − 1

µs/ div

t − Time − 1

µs/div

Feedthrough

FSYNC

Glitch

1

10

100

1 k

100 k

10

100

1 k

10 k

100 k

10 k

f − Frequency − Hz

DAC8580

SLAS458B – JUNE 2005 – REVISED AUGUST 2005

TYPICAL CHARACTERISTICS (AVDD = 5 V, AVSS = –5 V, VREF = 4.096 V, unless otherwise

noted) (continued)

POSITIVE SUPPLY CURRENT - IDD

NEGATIVE SUPPLY CURRENT - ISS

vs

vs

CODE

CODE

Figure 10.

Figure 11.

LARGE-SIGNAL SETTLING

SMALL-SIGNAL SETTLING

Figure 12.

Figure 13.

DIGITAL FEEDTHROUGH AND MID-CODE GLITCH

OUTPUT VOLTAGE NOISE

Figure 14.

Figure 15.

8

Not Recommended For New Designs