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TIMING CHARACTERISTICS

DAC8580

SLAS458B – JUNE 2005 – REVISED AUGUST 2005

ELECTRICAL CHARACTERISTICS (continued)

All specifications at T

A = TMIN to TMAX, +AVDD = +5 V, –AVDD = –5 V, DVDD = +5 V, VREF = 4.096 V, unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DAC output signal (sine wave) frequency = 1 kHz,

DAC input update rate = 192 KSPS,

–70

Digital filter is OFF

DAC output signal (sine wave) frequency = 40 kHz,

Total harmonic distortion (THD)

DAC input update rate =1 MSPS,

–68

–56

dB

Digital filter oversampling rate =16(3)

DAC output signal (sine wave) frequency = 1 kHz,

DAC input update rate = 192 KSPS,

–98

Software calibrated, digital filter is OFF(4)

DAC output signal is 1-kHz sine wave, –1 dBFS.

Signal to noise ratio (SNR)

110

dBFS

Noise bandwidth is from 0 to 10 kHz. (5)

Serial clock = 16 MHz,

Maximum output frequency (without external

Digital filter oversampling rate =16

0.2

MHz

analog filter)

THD > 50 dBs, without analog filter

Serial clock = 32 MHz,

Maximum output frequency (with external

Digital filter oversampling rate = 8(6)

1

MHz

analog filter)

THD > 50 dBs, with analog filter

Maximum output update rate

16

MHz

DIGITAL INPUT CHARACTERISTICS

VIH

0.7 x DVDD

DVDD

V

VIL

GND

0.3 x DVDD

Input leakage current

±0.05

±1

µA

Input capacitance

5

pF

Power-on delay

From VDD high to CS low

130

µs

POWER SUPPLY CHARACTERISTICS

+AVDD

4.0

5

6.0

V

–AVDD

–6.0

–5

–4.0

V

DVDD

1.8

AVDD

V

IDD

17

24

AVDD = 5.0 V, AVSS = –5.0 V,

mA

VREF = 4.096 V, IREF included

ISS

–23

–32

TEMPERATURE RANGE

Specified performance

–40

85

°C

(5)

A precision delta-sigma digitizer is used to make the measurement.

(6)

An oversampling ratio of 16X cannot be supported at 32 MHz clock frequency. 8X oversampling can be used instead to generate a

1-MHz output. To generate output frequencies over 200 kHz, use of analog anti-imaging filters are highly recommended. The DAC8580

digital filter still relaxes the analog filter requirements. At FOUT >200 kHz, large-signal waveforms have overshoot/undershoot due to the

settling characteristics of the output amplifiers. Small-signal waveforms don't show this behavior.

At –40°C to 85°C, DV

DD = +5 V, +AVDD = +5 V, –AVDD = –5 V, unless otherwise noted

(1) (2)

PARAMETER

MIN

MAX

UNIT

tsck

SCLK period

33

twsck

SCLK high or low time

16

tsu

Data setup time (input)

5

thi

Data hold time (input)

5

ns

tSWF

FSYNC setup time

5

tHWF

FSYNC hold time

5

tr

Rise time

20

1

tf

Fall time

20

1

tWFUPDAC

Delay from falling edge of FSYNC to loading DAC latch(3)

1.5

tsck

(1)

Specified by design. Not production tested.

(2)

Sample tested during the initial release and after any redesign or process changes that may affect this parameter.

(3)

OUTPUT of pin VOUT changes to new level immediately (within settling time) after DAC register is loaded.

4

Not Recommended For New Designs