ILIMREF

PGND

ILIM

SENSE

HG

DVDD

SW

CM

CMPREF

SS

SGND

VREF

VBOOT

V1R7

VSLP

VSTP

SLP

STP_CPU#

XPOK

DGND

PGOOD

VR_ON

VID0

VID1

VID2

VID3

VID4

VID5

VDD

DE_EN#

CLK_EN#

VDAC

SRCK

U1

D1

C2

R3

R4

R5

R6

R7

R8

C5

R1

C1

VDC

VCORE

LG

CBOOT

R2

+

R14

R15

0

4.7 PF

x 4

100

330 PF

100

C3

C4

C6

C7

C10

C13

.

0.22 PF

10

Q1

IRF660

8 x 2

CMDSH-3

C8

R13

150

R12

100

+

15 PF

x 6

C11

1

C9

27A Core Supply

0 1 PF

1200 pF

4700 pF

0.022 PF

100k

1.21k

1200 pF

R11

4.53k

7.5k

4.7 PF

1.0 PF

2.2

VCC5

x 3

C12

x 31

22 PF

0.001

IRF6618

x 2

Q2

1200 pF

R10

2.2

R9

0.44 PH

L1

C10, TDK C3216X5R1E475K

C11, Sanyo 25 TQC15

C12, AVX 12066D226MAT

C13, Panasonic EEFSD0D330R

L1, Pulse Eng. PA0513

VOVP

SLP

STP_CPU#

XPOK

PGOOD

VR_ON

VID0

VID1

VID2

VID3

VID4

VID5

DE_EN#

CLK_EN#

LM27213

www.ti.com

SNVS377A – FEBRUARY 2006 – REVISED MARCH 2013

environment and not the absolute zero volt reference it tends to be thought of. Pains should be taken at every

opportunity to ensure that sources of large pulse currents into the ground plane are bypassed as well as possible

to minimize the disturbances to the ground plane. Under no circumstances should the controller be grounded at a

point between the low-side FET source connection and the input capacitor ground connection point. This is a

very noisy area.

Pin 5, SRCK, is the low-side FET source Kelvin connection and as the name implies needs to be connected

directly to the low side FET source pads. This pin is used as the reference potential for the diode emulator

circuit. If not connected correctly, the supply will behave erratically at light loads. The correct connection for

SRCK is to tie the pin to one of the vias connecting the low-side FET source to the internal ground plane on an

internal layer or the back side of the board. The trace need not be wide. A 10mil trace is adequate, as this line

carries essentially no current.

The circuit above is an example of a single phase supply at much higher current. The FETs chosen lend

themselves well to the use of a heatsink if desired. The transient response is quite good for a single phase

below, high current design as seen from the scope photo below.

Copyright © 2006–2013, Texas Instruments Incorporated

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