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SY75608 датащи(PDF) 29 Page - Microchip Technology |
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SY75608 датащи(HTML) 29 Page - Microchip Technology |
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29 / 44 page ![]() 2021 - 2023 Microchip Technology Inc. and its subsidiaries DS20006363D-page 29 SY75608/612 3:2 out_disable_state[3:2] State of OUT1 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 1:0 out_disable_state[1:0] State of OUT0 driver when the corresponding bit in OUTEN register is set low. These bits should be set first before the corresponding bit in OUTEN register is toggled. 2’b00 = Both low (p output low, n output low) 2’b01 = Drive Low (p output low, n output high) 2’b10 = Outputs High-Z 2’b11 = Outputs High-Z R/W 00 State of Outputs when Disabled (Outputs 4 to 7) - OUTDSTATE1 (0x06) 7:6 out_disable_state[15:14] State of OUT7 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 5:4 out_disable_state[13:12] State of OUT6 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 3:2 out_disable_state[11:10] State of OUT5 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 1:0 out_disable_state[9:8] State of OUT4 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 State of Outputs when Disabled (Outputs 8 to 11) - OUTDSTATE2 (0x07) (Applies only to SY75612) 7:6 out_disable_state[23:22] State of OUT11 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 5:4 out_disable_state[21:20] State of OUT10 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 3:2 out_disable_state[19:18] State of OUT9 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 1:0 out_disable_state[17:16] State of OUT8 driver when the corresponding bit in OUTEN register is set low. The same bit configuration with OUT0. R/W 00 Output Enable (Outputs 0 to 7) - OUTEN0 (0x08) 7 outen7 Enable/Disable output 7. The same bit configuration with OUT0. RW 0 6 outen6 Enable/Disable output 6. The same bit configuration with OUT0. RW 0 5 outen5 Enable/Disable output 5. The same bit configuration with OUT0. RW 0 4 outen4 Enable/Disable output 4. The same bit configuration with OUT0. RW 0 3 outen3 Enable/Disable output 3. The same bit configuration with OUT0. RW 0 2 outen2 Enable/Disable output 2. The same bit configuration with OUT0. RW 0 TABLE 6-2: DETAILED REGISTER MAP (CONTINUED) Bit Name Description Type Reset |
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