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TMP108

SBOS663A – APRIL 2013 – REVISED SEPTEMBER 2019

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7.3.3 Bus Overview

The device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The

bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and

generates the start and stop conditions.

To address a specific device, initiate a start condition by pulling the data line (SDA) from a high to a low logic

level while SCL is high. All slaves on the bus shift in the slave address byte, and the last bit indicates whether a

read or write operation follows. During the ninth clock pulse, the slave being addressed responds to the master

by generating an acknowledge bit and pulling SDA low.

Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data

transfer, SDA must remain stable while SCL is high because any change in SDA while SCL is high is interpreted

as a start or stop signal.

After all data have been transferred, the master generates a stop condition indicated by pulling SDA from low to

high, while SCL is high.

7.3.4 Writing and Reading Operation

Accessing a particular register on the TMP108 is accomplished by writing the appropriate value to the pointer

register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W

bit low. Every write operation to the TMP108 requires a value for the pointer register (see Figure 2).

When reading from the TMP108, the last value stored in the pointer register by a write operation is used to

determine which register is read by a read operation. To change the register pointer for a read operation, a new

value must be written to the pointer register. This action is accomplished by issuing a slave address byte with the

R/W bit low, followed by the pointer register byte. No additional data are required. The master can then generate

a start condition and send the slave address byte with the R/W bit high to initiate the read command. See

Figure 3 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to

continually send the pointer register bytes because the TMP108 stores the pointer register value until it is

changed by the next write operation.

Note that register bytes are sent with the most significant byte first, followed by the least significant byte.

7.3.5 Slave Mode Operations

The TMP108 can operate as a slave receiver or slave transmitter.

7.3.5.1 Slave Receiver Mode:

The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP108 then

acknowledges reception of a valid address. The next byte transmitted by the master is the pointer register. The

TMP108 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the

register addressed by the pointer register. The TMP108 acknowledges reception of each data byte. The master

can terminate data transfer by generating a start or stop condition.

7.3.5.2 Slave Transmitter Mode:

The first byte transmitted by the master is the slave address, with the R/W bit high. The slave acknowledges

reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of

the register indicated by the pointer register. The master acknowledges reception of the data byte. The next byte

transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The

master can terminate data transfer by generating a not-acknowledge bit on reception of any data byte, or by

generating a start or stop condition.

7.3.6 SMBus Alert Function

The TMP108 supports the SMBus alert function. When the TMP108 operates in interrupt mode (TM = 1), the

ALERT pin may be connected as an SMBus alert signal. When a master senses that an alert condition is present

on the ALERT line, the master sends an SMBus alert command (00011001) to the bus. If the ALERT pin is

active, the device acknowledges the SMBus alert command and responds by returning its slave address on the

SDA line. The eighth bit (LSB) of the slave address byte indicates whether the alert condition is caused by the

temperature exceeding THIGH or falling below TLOW. The LSB is high if the temperature is greater than THIGH, or

low if the temperature is less than TLOW. See Figure 4 for details of this sequence.