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SN74HCS72-Q1

SCLS774 – OCTOBER 2019

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Copyright © 2019, Texas Instruments Incorporated

Typical Application (continued)

9.2.1.1 Output Considerations

In general, the load needs to be considered in the design to determine if the device will have the capability to

drive it. For this application, we assume that the flip-flop output is transmitting over a relatively short trace (under

10 cm) to a CMOS input.

Primary load factors to consider:

•

Load Capacitance: approximately 15 pF

–

See the Switching Characteristics section for the capacitive loads tested with this device.

–

Increasing capacitance will proportionally increase output transition times.

–

Decreasing capacitance will proportionally decrease output transition times, and can produce ringing due

to very fast transition rates. A 25-Ω resistor can be added in series with the output if ringing needs to be

dampened.

•

Load Current: expected maximum of 10 µA

–

Leakage current into connected devices.

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Parasitic current from other components.

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Resistive load current.

•

Output Voltage: see Electrical Characteristics for output voltage ratings at a given current.

–

Output HIGH (VOH) and output LOW (VOL) voltage levels affect the input voltage, VIH and VIL, respectively,

to subsequent devices.

9.2.1.2 Input Considerations

The SN74HCS72-Q1 has Schmitt-trigger inputs. Schmitt-trigger inputs have no limitation on transition rate,

however the input voltage must be larger than VT+(max) to be guaranteed to be read as a logic high, and below

VT-(min) to be guaranteed to be read as a logic low, as defined in the Electrical Characteristics. Do not exceed the

values specified in the Absolute Maximum Ratings or the device could be damaged.

9.2.1.3 Timing Considerations

The SN74HCS72-Q1 is a clocked device. As such, it requires special timing considerations to ensure normal

operation.

Primary timing factors to consider:

•

Maximum clock frequency: the maximum operating clock frequency defined in Timing Characteristics is the

maximum frequency at which the device is guaranteed to function. This value refers specifically to the

triggering waveform, measuring from one trigger level to the next.

•

Pulse duration: ensure that the triggering event duration is larger than the minimum pulse duration, as defined

in the Timing Characteristics.

•

Setup time: ensure that the data has changed at least one setup time prior to the triggering event, as defined

in the Timing Characteristics.

•

Hold time: ensure that the data remains in the desired state at least one hold time after the triggering event,

as defined in the Timing Characteristics.

9.2.2 Detailed Design Procedure

1. Recommended Input Conditions:

–

Input signals to Schmitt-trigger inputs, like those found on the HCS family of devices, can support

unlimited edge rates.

–

Input thresholds are listed in the Electrical Characteristics.

–

Inputs include positive clamp diodes. Input voltages can exceed the device's supply so long as the clamp

current ratings are observed from the Absolute Maximum Ratings. Do not exceed the absolute maximum

voltage rating of the device or it could be damaged.

2. Recommended Output Conditions:

–

Load currents should not exceed the value listed in the Absolute Maximum Ratings.

–

Series resistors on the output may be used if the user desires to slow the output edge signal or limit the