PCA8574_PCA8574A_2

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 02 — 14 May 2007

7 of 27

NXP Semiconductors

PCA8574/74A

8.

I/O programming

8.1 Quasi-bidirectional I/O architecture

The PCA8574/74A’s 8 ports (see Figure 2) are entirely independent and can be used

either as input or output ports. Input data is transferred from the ports to the

microcontroller in the Read mode (see Figure 9). Output data is transmitted to the ports in

the Write mode (see Figure 8).

This quasi-bidirectional I/O can be used as an input or output without the use of a control

signal for data directions. At power-on the I/Os are HIGH. In this mode only a current

edges into heavily loaded outputs. These devices turn on when an output is written HIGH,

and are switched off by the negative edge of SCL. The I/Os should be HIGH before being

used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as

inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the

write mode.

Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large

8.2 Writing to the port (Output mode)

To write, the master (microcontroller) first addresses the slave device. By setting the last

bit of the byte containing the slave address to logic 0 the write mode is entered. The

PCA8574/74A acknowledges and the master sends the data byte for P7 to P0 and is

acknowledged by the PCA8574/74A. The 8-bit data is presented on the port lines after it

has been acknowledged by the PCA8574/74A.

The number of data bytes that can be sent successively is not limited. The previous data

is overwritten every time a data byte has been sent.

Table 5.

PCA8574A address map

A6

A5

A4

A3

A2

A1

A0

Address

011100038h

011100139h

01110103Ah

01110113Bh

01111003Ch

01111013Dh

01111103Eh

01111113Fh