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2020 Microchip Technology Inc.

DS20006309B-page 1

PL133-21

Features

• Two LVCMOS Outputs

• Input/Output Frequency: 1 MHz to 150 MHz

• Supports LVCMOS or Sine-Wave Input Clock

• Output Enable (OE) only Controls CLK0. CLK1 is

Always On.

• Extremely Low Additive Jitter

• 8 mA Output Drive Strength

• Low Current Consumption

• Single 1.8V, 2.5V, or 3.3V ±10% Power Supply

• Operating Temperature Range:

- 0° to +70°C (Commercial)

- –40° to +85°C (Industrial)

• Available in TDFN-6L Green/RoHS-Compliant

Package

Package Type

General Description

The PL133-21 is an advanced inverting fanout buffer

design for high performance, low-power, small

form-factor applications. The PL133-21 accepts a

reference clock input of 1 MHz to 150 MHz and

produces two outputs of the same frequency.

Reference clock inputs may be LVCMOS or sine-wave

signals (the inputs are internally AC-coupled).

PL133-21 is designed to fit in a small 2 mm x 1.3 mm x

0.6 mm TDFN package and offers the best phase

noise, jitter performance, and lowest power

consumption of any comparable IC.

Functional Block Diagram

PL133-21

2 mm x 1.3 mm TDFN

(Top View)

FIN

GND

OE

VDD

CLK0

CLK1

1

4

5

6

3

2

FIN

CLK1

CLK0

OE

Low-Power, 1.62V to 3.63V, 1:2 Inverting Fanout Buffer IC