| поискавой системы для электроныых деталей |
|
PL133-21 датащи(PDF) 3 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PL133-21 датащи(HTML) 3 Page - Microchip Technology |
|
3 / 14 page ![]() 2020 Microchip Technology Inc. DS20006309B-page 3 PL133-21 2.0 NOISE CHARACTERISTICS FIGURE 2-1: PL133-21 Additive Phase Jitter. VDD = 3.3V, CLK = 26 MHz, Integration Range: 12 kHz to 5 MHz, 0.127 ps Typical. When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the output of the buffer will be a little bit more than the phase noise in the input signal. To quantify the noise addition in the buffer we compare the Phase Jitter numbers from the input and the output. The difference is called Additive Phase Jitter. The formula for the Additive Phase Jitter is as follows: EQUATION 2-1: TABLE 2-1: NOISE CHARACTERISTICS Parameter Symbol Min. Typ. Max. Units Conditions Additive Phase Jitter — 130 — fs VDD = 3.3V, Frequency = 26 MHz Offset = 12 kHz ~ 5 MHz — 150 — VDD = 3.3V, Frequency = 100 MHz Offset = 12 kHz ~ 20 MHz -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 10 100 1000 10000 100000 1000000 10000000 Offset Frequency (Hz) REF Input PL133-21 Output Additive Phase Jitter Output Phase Jitter2 Input Phase Jitter2 – = |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |