PCM3000ESLASH2K datasheet(35/44 Pages) TI2

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GROUNDING

VOLTAGE INPUTS

VREF INPUTS

CINP AND CINN INPUTS

VCOM INPUT

SYSTEM CLOCK

RSTB CONTROL

PCM3000

PCM3001

SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004

APPLICATION INFORMATION (continued)

In order to optimize dynamic performance of the PCM3000/3001, the analog and digital grounds are not

internally connected. PCM3000/3001 performance is optimized with a single ground plane for all returns. It is

recommended to tie all PCM3000/3001 ground pins to the analog ground plane using low-impedance

connections. The PCM3000/3001 should reside entirely over this plane to avoid coupling high-frequency digital

switching noise into the analog ground plane.

A tantalum or aluminum electrolytic capacitor, between 2.2

µF and 10 µF, is recommended as an ac-coupling

capacitor at the inputs. Combined with the 15-k

Ω characteristic input impedance, a 2.2-µF coupling capacitor

establishes a 4.8-Hz cutoff frequency for blocking dc. The input voltage range can be increased by adding a

series resistor on the analog input line. This series resistor, when combined with the 15-k

Ω input impedance,

creates a voltage divider and enables larger input ranges.

A 4.7-

µF to 10-µF tantalum capacitor is recommended between V

REFL, VREFR, and AGND1 to ensure low source

impedance for the ADC references. These capacitors should be located as close as possible to the reference

pins to reduce dynamic errors on the ADC reference.

A 470-pF to 1000-pF film or NPO ceramic capacitor is recommended between CINPL and CINNL, and also

between CINPR and CINNR to create an antialias filter that has a 170-kHz to 80-kHz cutoff frequency. These

capacitors should be located as close as possible to the CINP and CINN pins to avoid introducing undesirable

noise or dynamic errors into the delta-sigma modulator.

A 4.7-

µF to 10-µF tantalum capacitor is recommended between VCOM and AGND2 to ensure low source

impedance of the DAC output common. This capacitor should located as close as possible to the VCOM pin to

reduce dynamic errors on the DAC common.

The quality of the system clock can influence the dynamic performance of both the ADC and DAC in the

PCM3000/3001. The duty cycle, jitter, and threshold voltage at the system clock input pin should be carefully

managed. When power is supplied to the part, the system clock, bit clock (BCKIN), and word clock (LCRIN) must

also be supplied simultaneously. Failure to supply the audio clocks results in a power dissipation increase of up

to three times normal dissipation and may degrade long-term reliability if the maximum power dissipation limit is

exceeded.

If capacitors greater than 4.7

µF are used on V

REF and VCOM, an external reset control with delay time

corresponding to the VREF, VCOM response is required.

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