PCM1740

3

SBAS128B

www.ti.com

ELECTRICAL CHARACTERISTICS

All specifications at TA = +25°C, VCC = VDD = VPP = 5.0V, fS = 44.1kHz, system clock = 384fS, 16-bit data, unless otherwise noted.

PCM1740E

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

RESOLUTION

16

Bits

DATA FORMAT

Audio Interface Format

Standard /I2S Selectable

Audio Data Bit Length

16/20/24 Selectable

Bits

Audio Data Format

MSB First, Two’s Binary Complement

Sampling Frequency (fS)

Standard (fS)

32

44.1

48

kHz

Half (fS)

16

22.05

24

kHz

Double (fS)

64

88.2

96

kHz

Internal System Clock Frequency

256fS/384fS

DIGITAL INPUT/OUTPUT

Logic Family

Input Logic

TTL Compatible

High Level Input Voltage: VIH(1), (2)

2.0

VDC

Low Level Input Voltage: VIL(1), (2)

0.8

VDC

High Level Input Current: IIH(1), (2)

VIH = VDD

±10

µA

Low Level Input Current:

IIL(1)

VIL = 0V

±10

µA

IIL(2)

VIL = 0V

–120

µA

High Level Output Voltage: VOH(3)

IOH = –2mA

VDD – 0.5V

VDC

Low Level Output Voltage:

VOL(3)

IOL = 4mA

0.5

VDC

VOL(4)

IOL = 2mA

0.5

VDC

DIGITAL INPUT/OUTPUT of I2C-BUS INTERFACE

High Level Input Voltage: VIH(5)

3.0

V

Low Level Input Voltage: VIL(5)

–0.3

1.5

V

Low Level Output Voltage: VOL(6)

0

0.4

V

Output Fall Time: tOF(7)

250

ns

Input Logic Current: II(8)

10% to 90% of VDD

–10

10

µA

Capacitance for each I/O pin: CI(5)

10

pF

VCXO CHARACTERISTICS (MCKO)

27MHz, Fundamental Crystal

Crystal Clock Frequency (9)

27.0000

MHz

Crystal Clock Accuracy(9)

±30

ppm

XTUN Tuning Voltage Range(10)

0

3.0

V

XTUN Input Impedance(10)

60

k

Ω

Output Clock Frequency

XTUN = 1.3V

27.0000

MHz

Output Clock Accuracy

XTUN = 1.3V

±50

ppm

VCXO Tuning Range

XTUN = 0V – 3V

300

ppm

Output Clock Duty Cycle

10pF Load

35

45

55

%

Output Clock Jitter

Standard Deviation

100

ps

Output Rise Time

20% to 80% VDD, 10pF Load

4

ns

Output Fall Time

80% to 20% VDD, 10pF Load

4

ns

Response Time(11)

10

µs

Power Up Time(12)

5ms

PLL AC CHARACTERISTICS (SCKO)

Output Clock Frequency

MCKO = 27.0MHz

4.096

36.864

MHz

Output Clock Duty Cycle

10pF Load

40

50

60

%

Output Clock Jitter

Standard Deviation

150

ps

Output Rise Time

20% to 80% VDD, 10pF Load

4

ns

Output Fall Time

80% to 20% VDD, 10pF Load

4

ns

Frequency Transition Time(13)

20

ms

Power Up Time(14)

15

30

ms

DYNAMIC PERFORMANCE(15)

THD+N:

VOUT = 0dB

fS = 44.1kHz

0.0035

0.01

%

fS = 96kHz

0.007

%

VOUT = –60dB

fS = 44.1kHz

0.0035

0.01

%

fS = 96kHz

0.007

%

Dynamic Range

fS = 44.1kHz, EIAJ, A-Weighted

90

94

dB

fS = 96kHz, A-Weighted

90

dB

Signal-to-Noise Ratio(16)

fS = 44.1kHz, EIAJ, A-weighted

90

94

dB

fS = 96kHz, A-weighted

90

dB

Channel Separation

fS = 44.1kHz

88

92

dB

fS = 96kHz

88

dB

Level Linearity Error

VOUT = –90dB

±1.0

dB