поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

M58LR128GT датащи(PDF) 69 Page - STMicroelectronics

номер детали M58LR128GT
подробное описание детали  128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
PDF  84 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M58LR128GT датащи(HTML) 69 Page - STMicroelectronics

Back Button M58LR128GT Datasheet HTML 65Page - STMicroelectronics M58LR128GT Datasheet HTML 66Page - STMicroelectronics M58LR128GT Datasheet HTML 67Page - STMicroelectronics M58LR128GT Datasheet HTML 68Page - STMicroelectronics M58LR128GT Datasheet HTML 69Page - STMicroelectronics M58LR128GT Datasheet HTML 70Page - STMicroelectronics M58LR128GT Datasheet HTML 71Page - STMicroelectronics M58LR128GT Datasheet HTML 72Page - STMicroelectronics M58LR128GT Datasheet HTML 73Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 69 / 84 page
background image
69/84
M58LR128GT, M58LR128GB
Note: 1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank Regions. There are two Bank Regions, see Tables 30, 31, 32, 33, 34, and 35 in APPENDIX A.
(P+3F)h = 149h
03h
(P+47)h = 151h
03h
Bank Region 2 (Erase Block Type 1):Page mode and
Synchronous mode capabilities (defined in Table 42.)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+40)h = 14Ah
03h
Bank Region 2 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase blocks in
each bank
Bits 16-31: n×256 = number of bytes in erase block region
(P+41)h = 14Bh
00h
(P+42)h = 14Ch
80h
(P+43)h = 14Dh
00h
(P+44)h =14Eh
64h
Bank Region 2 (Erase Block Type 2)
Minimum block erase cycles × 1000
(P+45)h = 14Fh
00h
(P+46)h = 150h
02h
Bank Region 2 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+47)h = 151h
03h
Bank Region 2 (Erase Block Type 2): Page mode and
Synchronous mode capabilities (defined in Table 42.)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+48)h = 152h
(P+48)h = 152h
Feature Space definitions
(P+49)h = 153h
(P+43)h = 153h
Reserved
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com