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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M68HC08 датащи(PDF) 85 Page - Freescale Semiconductor, Inc |
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M68HC08 датащи(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 172 page  MC68HC908JL3E Family Data Sheet, Rev. 3 Freescale Semiconductor 85 Chapter 8 Timer Interface Module (TIM) 8.1 Introduction This section describes the timer interface module (TIM2, Version B). The TIM is a two-channel timer that provides a timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 8-1 is a block diagram of the TIM. 8.2 Features Features of the TIM include the following: • Two input capture/output compare channels – Rising-edge, falling-edge, or any-edge input capture trigger – Set, clear, or toggle output compare action • Buffered and unbuffered pulse width modulation (PWM) signal generation • Programmable TIM clock input with 7-frequency internal bus clock prescaler selection • Free-running or modulo up-count operation • Toggle any channel pin on overflow • TIM counter stop and reset bits 8.3 Pin Name Conventions The TIM share two I/O pins with two port D I/O pins. The full name of the TIM I/O pins are listed in Table 8-1. The generic pin name appear in the text that follows. Table 8-1. Pin Name Conventions TIM Generic Pin Names: TCH0 TCH1 Full TIM Pin Names: PTD4/TCH0 PTD5/TCH1 |
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