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WM8994ECS/R датащи(PDF) 147 Page - Cirrus Logic

номер детали WM8994ECS/R
подробное описание детали  Multi-channel Audio Hub CODEC for Smartphones
PDF  363 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8994ECS/R датащи(HTML) 147 Page - Cirrus Logic

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WM8994
Rev 4.6
147
The line outputs incorporate a common mode, or ground loop, feedback path which provides rejection
of system-related ground noise. The return path, via LINEOUTFB, is enabled separately for
LINEOUT1 and LINEOUT2 using the LINEOUT1_FB and LINEOUT2_FB bits as defined in Table 77.
Ground loop feedback is a benefit to single-ended line outputs only; it is not applicable to differential
outputs, which already inherently offer common mode noise rejection.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R55 (0037h)
Additional
Control
7
LINEOUT1_FB
0
Enable ground loop noise
feedback on LINEOUT1
0 = Disabled
1 = Enabled
6
LINEOUT2_FB
0
Enable ground loop noise
feedback on LINEOUT2
0 = Disabled
1 = Enabled
Table 77 Line Output Ground Loop Feedback Enable
GENERAL PURPOSE INPUT/OUTPUT
The WM8994 provides a number of GPIO functions to enable interfacing and detection of external
hardware and to provide logic outputs to other devices. The input functions can be polled directly or
can be used to generate an Interrupt (IRQ) event. The GPIO and Interrupt circuits support the
following functions:
Alternate interface functions (AIF2, AIF3)
Button detect (GPIO input)
Logic ‘1’ and logic ‘0’ output (GPIO output)
SDOUT (4-wire SPI Control Interface data)
Interrupt (IRQ) status output
Over-Temperature detection
Accessory detection (MICBIAS current detection)
Frequency Locked Loop (FLL) Lock status output
Sample Rate Conversion (SRC) Lock status output
Dynamic Range Control (DRC) Signal activity detection
Control Write Sequencer status output
Digital Core FIFO error status output
Clock output (SYSCLK divided by OPCLK_DIV)
Frequency Locked Loop (FLL) Clock output



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