WM8994ECSSLASHR datasheet(143/363 Pages) CIRRUS

143 / 363 page

WM8994

Rev 4.6

143

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R34 (0022h)

SPKMIXL

Attenuation

SPKAB_REF_SEL

Selects Reference for Speaker in

Class AB mode

0 = SPKVDD/2

1 = VMID

R1825

(0721h)

Pull Control

(2)

SPKMODE_PU

SPKMODE Pull-up enable

0 = Disabled

1 = Enabled

Table 74 Speaker Mode and Boost Control

Clocking of the Class D output driver is derived from SYSCLK. The clocking frequency division is

configured automatically, according to the AIFn_SR and AIFnCLK_RATE registers.

(See “Clocking

and Sample Rates

” for further details of the system clocks and control registers.)

The Class D switching clock is enabled whenever SPKOUTL_ENA or SPKOUTR_ENA is set,

provided also that SPKOUT_CLASSAB = 0. The frequency is as described in Table 75.

When AIF1CLK is selected as the SYSCLK source (SYSCLK_SRC = 0), then the Class D clock

frequency is controlled by the AIF1_SR and AIF1CLK_RATE registers.

When AIF2CLK is selected as the SYSCLK source (SYSCLK_SRC = 1), then the Class D clock

frequency is controlled by the AIF2_SR and AIF2CLK_RATE registers.

Note that the applicable clocks (SYSCLK, AIF1CLK or AIF2CLK) must be present and enabled when

using the speaker outputs in Class D mode.

SAMPLE

RATE (kHz)

SYSCLK RATE (AIFnCLK / fs ratio)

128

192

256

384

512

768

1024

1536

256

341.3

256

341.3

256

341.3

256

11.025

352.8

384

341.3

384

341.3

384

341.3

384

22.05

352.8

384

341.3

384

341.3

384

44.1

352.8

384

88.2

352.8

384

Table 75 Class D Switching Frequency (kHz)

HEADPHONE OUTPUT CONFIGURATIONS

The headphone outputs HPOUT1L and HPOUT1R are driven by the headphone output PGAs

HPOUT1LVOL and HPOUT1RVOL. Each PGA has its own dedicated volume control, as described in

the

“Analogue Output Signal Path” section. The input to these PGAs can be either the output mixers

MIXOUTL and MIXOUTR or the direct DAC1 outputs DAC1L and DAC1R.

The headphone output driver is capable of driving up to 30mW into a 16

Ω load or 25mW into a 32Ω

load such as a stereo headset or headphones. The outputs are ground-referenced, eliminating any

requirement for AC coupling capacitors. This is achieved by having separate positive and negative

supply rails powered by an on-chip charge pump. A DC Servo circuit removes any DC offset from the

headphone outputs, suppressing

‘pop’ noise and minimising power consumption. The Charge Pump

and DC Servo are described separately (see “Charge Pump” and “DC Servo” respectively).

It is recommended to connect a zobel network to the headphone output pins HPOUT1L and

HPOUT1R for best audio performance in all applications. The components of the zobel network have

the effect of dampening high frequency oscillations or instabilities that can arise outside the audio

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