WM8994ECSSLASHR datasheet(60/363 Pages) CIRRUS

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WM8994

Rev 4.6

DIGITAL PULL-UP AND PULL-DOWN

The WM8994 provides integrated pull-up and pull-down resistors on the DMICDAT1 and DMICDAT2

pins. This provides a flexible capability for interfacing with other devices. Each of the pull-up and pull-

down resistors can be configured independently using the register bits described in Table 12.

Note that, if the DMICDAT1 or DMICDAT2 digital microphone channels are disabled, or if

DMICDATn_PU and DMICDATn_PD are both set, then the pull-up and pull-down will be disabled on

the respective pin.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1824

(0720h)

Pull Control

(1)

DMICDAT2_PU

DMICDAT2 Pull-Up enable

0 = Disabled

1 = Enabled

DMICDAT2_PD

DMICDAT2 Pull-Down enable

0 = Disabled

1 = Enabled

DMICDAT1_PU

DMICDAT1 Pull-Up enable

0 = Disabled

1 = Enabled

DMICDAT1_PD

DMICDAT1 Pull-Down enable

0 = Disabled

1 = Enabled

Table 12 Digital Pull-Up and Pull-Down Control

ANALOGUE TO DIGITAL CONVERTER (ADC)

The WM8994 uses stereo 24-bit sigma-delta ADCs. The use of multi-bit feedback and high

oversampling rates reduces the effects of jitter and high frequency noise. The oversample rate can be

adjusted, if required, to reduce power consumption -

see “Clocking and Sample Rates” for details. The

ADC full scale input level is proportional to AVDD1 -

see “Electrical Characteristics”. Any input signal

greater than full scale may overload the ADC and cause distortion.

The ADCs are enabled by the ADCL_ENA and ADCR_ENA register bits.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R4 (0004h)

Power

Management (4)

ADCL_ENA

Left ADC Enable

0 = Disabled

1 = Enabled

ADCR_ENA

Right ADC Enable

0 = Disabled

1 = Enabled

Table 13 ADC Enable Control

The outputs of the ADCs can be routed to the Left/Right channels of AIF1 (Timeslot 0).

Digital volume control of the ADC outputs in the AIF1 signal paths is provided using the registers

described in the “Digital Volume and Filter Control” section.

The outputs of the ADCs can be routed, in a limited number of configurations, to the digital mixing

output bus, via the digital sidetone signal paths. See “Digital Mixing” for further details.

Digital volume control of the ADC outputs in the digital sidetone signal paths is provided using the

registers described in the “Digital Mixing” section.

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