MP86992

– 50A INTELLI-PHASETM SOLUTION IN LGA (5MMX6MM)

MP86992 Rev. 1.0

www.MonolithicPower.com

9

11/5/2019

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2019 MPS. All Rights Reserved.

APPLICATION INFORMATION

Operation

The MP86992 is a 50A, monolithic, half-bridge

driver with MOSFETs ideally suited for multi-

phase buck regulators. An external 3.3V supply

is required to supply both VDD and VDRV. When

EN transitions from low to high and the VDRV

signals are sufficiently high, operation begins.

Pulse-Width Modulation (PWM)

The pulse-width modulation (PWM) input pin is

capable of tri-state input. When the PWM input

signal is within the tri-state threshold window for

(typically) 50ns (tHT or tLT), the high-side

MOSFET (HS-FET) turns off immediately, and

the low-side MOSFET (LS-FET) enters diode

emulation mode, which is on until zero-current

detection (ZCD). The tri-state PWM input can

come from a forced mid-voltage PWM signal or

from floating the PWM input. The internal current

source charges the signal to a middle voltage.

The

PMW

Timing

Diagram

shows

the

propagation delay definition from PWM to SW

node (Figure 1).

Diode Emulation Mode

In diode emulation mode, when PWM is low or in

a tri-state input, the LS-FET turns on whenever

the inductor current is positive. The LS-FET

turns off if the inductor current is negative or after

the inductor current crosses the zero current.

Diode emulation mode can be enabled by driving

PWM to a middle state or floating PWM.

Current Sense

IOUT is a bidirectional current-source pin

proportional to the inductor current. The current-

sensing gain is 5μA/A. A resistor is used to

program the voltage gain proportional to the

inductor current, if needed.

The IOUT output has two states (see Table 1). In

disable mode (EN = low), the current-sense

circuit is disabled, and IOUT is in a Hi-Z (high-

impedance) state.

Table 1: IOUT Output States

PWM

EN

IOUT

PWM

High

Active

x

Low

Hi-Z

An IOUT voltage range of 0.7V to 2.1V is

required to achieve an accurate IOUT current

output of up to +25

0μA/-175μA (e.g. +50A/-35A).

Generally there is a resistor (RIOUT), connected

from IOUT to an external voltage, that is capable

of sinking small currents to provide enough

voltage level to meet the required operating

voltage range. A proper reference voltage (VCM)

and RIOUT value can be determined with Equation

(1) and Equation (2):

IOUT

IOUT

CM

0.7V

I

R

V

2.1V









(1)

IOUT

SW

IOUT

I

I

G



(2)

Where VCM is a reference voltage connected to

RIOUT.

The Intelli-PhaseTM current-sense output can be

used by the controller to monitor the output

current accurately. The cycle-by-cycle current

information from IOUT can be used for phase-

current balancing, over-current protection, and

active-voltage positioning (output voltage droop).

Positive and Negative Inductor Current Limit

When HS-FET over-current is detected, the HS-

FET turns off for that PWM cycle. If there are

eight consecutive cycles of an HS-FET current

limit event, the HS-FET latches off, TOUT/FLT

pulls high to VDD, and the LS-FET turns on until

ZCD. Toggle EN, or recycle VIN or VDD to release

the latch and restart the device.

When the LS-FET detects a -35A valley current,

the MP86992 turns off the LS-FET and turns on

the HS-FET for 200ns to limit the negative

current. The LS-FET negative current limit will

not trigger a fault report.

Temperature

Sense

Output

with

Fault

indicator (TOUT/FLT)

TOUT/FLT is a pin with two functions: junction

temperature sense and fault detection.

TOUT/FLT has a voltage output proportional to

the junction temperature whenever VDD is

higher than its UVLO and the part is in active

mode. The gain is 8mV/°C, and has a +800mV

offset at 25°C. For example, 0.8V @ TJ = 25°C

and 1.6V @ TJ = 125°C.