LPC2292 datasheet(19/54 Pages) PHILIPS

19 / 54 page

LPC2292_2294_6

Product data sheet

Rev. 06 — 10 December 2007

19 of 54

NXP Semiconductors

LPC2292/LPC2294

16/32-bit ARM microcontrollers with external memory interface

6.8 General purpose parallel I/O (GPIO) and Fast I/O

Device pins that are not connected to a speciﬁc peripheral function are controlled by the

parallel I/O registers. Pins may be dynamically conﬁgured as inputs or outputs. Separate

registers allow setting or clearing any number of outputs simultaneously. The value of the

output register may be read back, as well as the current state of the port pins.

6.8.1 Features

• Bit-level set and clear registers allow a single instruction set or clear of any number of

bits in one port.

• Direction control of individual bits.

• Separate control of output set and clear.

• All I/O default to inputs after reset.

6.8.2 Features added with the Fast GPIO set of registers available on

LPC2292/2294/01 only

• Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O

timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices.

• Mask registers allow treating sets of port bits as a group, leaving other bits

unchanged.

• All Fast GPIO registers are byte addressable.

• Entire port value can be written in one instruction.

• Ports are accessible via either the legacy group of registers (GPIOs) or the group of

registers providing accelerated port access (Fast GPIOs).

6.9 10-bit ADC

The LPC2292/2294 each contain a single 10-bit successive approximation ADC with four

multiplexed channels.

6.9.1 Features

• Measurement range of 0 V to 3 V.

• Capable of performing more than 400000 10-bit samples per second.

• Burst conversion mode for single or multiple inputs.

• Optional conversion on transition on input pin or Timer Match signal.

6.9.2 ADC features available in LPC2292/2294/01 only

• Every analog input has a dedicated result register to reduce interrupt overhead.

• Every analog input can generate an interrupt once the conversion is completed.

• The ADC pads are 5 V tolerant when conﬁgured for digital I/O function(s).

LPC2292 датащи(PDF) 19 Page - NXP Semiconductors