Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

8 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

®

RECOMMENDED OPERATING CONDITIONS

Parameter

Min.

Typ.

Max.

Units

V12: Supply voltage

+10.8

+12.0

+13.2

V

V50: Supply voltage

+10.0

+55

V

VCSPA, VCSCAL, VD: DSW50 block voltage

0

V50

IO(V5): V5 bias output current

20

mA

VREFIN, VNTC, VCONF: Analog input voltage

0

+5.0

V

VENCAL, VENG, VENTX, VSYNC: Logic input voltage

0

+5.5

V

VSDA, VSCL, VPG, VXINT: Open-drain pull-up voltage

+3.3

+5.5

V

IOL(SDA), IOL(SDA50), IOL(SCL50), IOL(PG), IOL(XINT): Current into open-drain pins

+1

mA

L1: REGG output filter coil value

6.8

µH

CGATE: REGG output filter capacitor value

22

µF

CCOMP: REGG loop compensation capacitance

470

pF

RRT: REGG switching frequency programming resistance

120

kΩ

CTOTAL(SCL50), CTOTAL(SDA50): Total bus-node capacitance

400

pF

All voltage values are to ground unless otherwise specified. The AGND and PGND pins are shorted together with the shortest PCB traces.