SML2108F datasheet(11/21 Pages) SUMMIT

11 / 21 page

2053 2.2 11/07/00

SML2108

SUMMIT MICROELECTRONICS, Inc.

PRELIMINARY

REGISTERS

2053 Reg0 1.0

The SML2108 has three user programmable, nonvolatile

configuration registers.

This register is used to configure the 8-Bit ADC that

monitors the bias current. Bit 7 enables the ADC alert to

be latched, which will hold the ALERT pin low until the alert

is reset. Bits 6, 5, and 4 are used to set the sample interval

of the ADC. The input to the ADC can be scaled and offset

to provide maximum resolution over the bias current. Bits

3 and 2 are used to set the full scale range of the ADC,

while bits 1 and 0 are used to set the ADC offset. See the

Table.

This register controls multiple functions. Bit 7 disables the

alert during a manual analog-to-digital conversion of the

bias current. Bit 6 selects the action that will reset an alert

from the ADC. When this bit is set to a 0 any device read

or write will reset the alert. When set to a 1 the alert will be

reset by a low AUTOMON signal. Bit 5 is used to toggle

the source of the ADC input between the IBIAS current and

the EXT TEMP signal. Bit 2 initializes the input of the 10

bit DAC to either zero or a stored value from a nonvolatile

input of the 8 bit DAC to either zero or a stored value from

a nonvolatile register when the device is powered up. Bit

0 sets the maximum P-channel bias current (IBIASP) and

modulation current (IMODP) to either 10mA or 100mA.

This register controls several functions related to the bus

interface. Bits 7 and 6 control the read and write access

to the configuration registers. It is imperative that register

2 be programmed properly to prevent an inadvertent

lockout. Bit 5 determines whether the memory array is

available or locked. Bit 4 selects the device type address

for accessing the memory array, while bit 3 determines

whether the device must receive a bus address that

corresponds to the biasing of the address pins. Bit 2 is

used to enable an alert condition on the ADC to shut down

the bias current. Bits 1 & 0 are unused.

xxx

000

111

xxx

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