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TMP86CS44UG датащи(PDF) 62 Page - Toshiba Semiconductor

номер детали TMP86CS44UG
подробное описание детали  8 Bit Microcontroller
PDF  172 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TMP86CS44UG датащи(HTML) 62 Page - Toshiba Semiconductor

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Page 52
5. I/O Ports
TMP86CS44UG
5.5 Port P4 (P47 to P40)
Port P4 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit under software
control. Input/output mode is specified by the corresponding bit in the port P4 input/output control register (P4CR).
Port P4 is configured as an input if its corresponding P4CR bit is cleared to “0”, and as an output if its corresponding
P4CR bit is set to “1”.
During reset, the P4CR is initialized to “0” and port P4 is input mode. The P4 output latches are also initialized to
“0”.
When used as an input port, the corresponding bit of P4CR is cleared to “0”.
When used as an output port, the corresponding bit of P4CR is set to “1”. Data can be written into the output latch
regardless of P4CR contents, therefore initial output data should be written into the output latch before setting P4CR.
Figure 5-6 Port P4
Note: Ports set to the input mode read the pin states. Ports set to the output mode read the output latch. When input pin and out-
put pin exist in port P4 together, the contents of the output latch which is specified as an input mode may be rewritten by
executing the bit manipulation instructions.
P4DR
(0004H)
R/W
76
543
21
0
P47
P46
P45
P44
P43
P42
P41
P40
(Initial value: 0000 0000)
P4CR
(000FH)
76
543
21
0
(Initial value: 0000 0000)
P4CR
I/O control for port P4 (Speci-
fied for each bit)
0: Input mode
1: Output mode
R/W
Output latch
Data input (P4DR)
Data output
STOP
OUTEN
P4CRi
P4CRi input
P4i
Note:i=7
to 0
D
Q
D
Q



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