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TMP86CS44UG датащи(PDF) 61 Page - Toshiba Semiconductor |
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TMP86CS44UG датащи(HTML) 61 Page - Toshiba Semiconductor |
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61 / 172 page ![]() Page 51 TMP86CS44UG 5.4 Port P3 (P37 to P30) Port P3 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit under software control. Port P3 is also used as an analog input, key on wake up input. Input/output mode is specified by the corre- sponding bit in the port P3 input/output control register (P3CR), and AINDS (bit 4 in ADCCR1). During reset, P3CR are initialized to “0” and AINDS is set to “1”, therefore port P3 is configured as an input. When used as an analog input, set an analog input channel to SAIN (bit 0, 1, 2 in ADCCR1) and clear AINDS to “0”. When AINDS is “0”, the pin which is specified as an analog input is used as analog input independent on the value of P3CR and P3DR. When used as an input port or key on wake up input, the corresponding bit of P3CR is cleared to “0” without spec- ifying as an analog input. When the AD converter is enabled (AINDS is “0”), the data of port which is selected as an analog input is read “0”. and the data of port which is not selected as an analog input is read “0” or “1”, depend on the voltage level. When used as an output port, the corresponding bit of P3CR is set to “1” without specifying as an analog input. Data can be written into the output latch regardless of P3CR contents, therefore initial output data should be written into the output latch before setting P3CR. The pins not used as analog input can be used as an input/output port. But output instructions should not be exe- cuted to keep a precision. In addition, a variable signal should not be input to an adjacent port to the analog input during AD conversion. Figure 5-5 Port P3 Note: Ports set to the input mode read the pin states. Ports set to the output mode read the output latch. When input pin and out- put pin exist in port P3 together, the contents of the output latch which is specified as an input mode may be rewritten by executing the bit manipulation instructions. P3DR (0003H) R/W 76 543 21 0 P37 AIN7 STOP5 P36 AIN6 STOP4 P35 AIN5 STOP3 P34 AIN4 STOP2 P33 AIN3 P32 AIN2 P31 AIN1 P30 AIN0 (Initial value: 0000 0000) P3CR (000EH) 76 543 21 0 (Initial value: 0000 0000) P3CR I/O control (Specified for each bit) 0: Input mode 1: Output mode R/W Output latch Output latch Data input (P3DR) Analog input Key on wake up Data output (P3DR) STOP STOPjEN OUTEN AINDS SAIN P3CRi P3i Note: i = 7 to 0 j = 5 to 2 P3CRi input D Q D Q |
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