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APPLICATION INFORMATION

THEORY OF OPERATION

Natural Interleaving

Programming the PWM Frequency and Maximum Duty-Cycle Clamp

(

)

(

)

7500

RT

PWM

R

k

f

kHz

W =

(

)

2

1

DMX

RT

MAX

R

R

D

=

´

´

-

UCC28070

SLUS794 – NOVEMBER 2007

One of the main benefits from the natural interleaving of phases is significant reductions in the high-frequency

ripple components of both the input current and the current into the output capacitor of the PFC pre-regulator.

Compared to that of a single-phase PFC stage of equal power, the reduced ripple on the input current eases the

with reduced ripple and average current in each phase, the boost inductor size can be smaller than in a

single-phase design [1].

Ripple current reduction due to interleaving is often referred to as “ripple cancellation”, but strictly speaking, the

peak-to-peak ripple is completely cancelled only at 50% duty-cycle in a 2-phase system. At duty-cycles other

than 50%, ripple reduction occurs in the form of partial cancellation due to the superposition of the individual

phase currents. Nevertheless, compared to the ripple currents of an equivalent single-phase PFC pre-regulator,

those of a 2-phase naturally-interleaved design are extraordinarily smaller [1]. Independent of ripple cancellation,

On the input, natural interleaving reduces the peak-to-peak ripple amplitude to 1/2 or less of the ripple amplitude

of the equivalent single-phase current.

On the output, Natural Interleaving reduces the rms value of the PFC-generated ripple current in the output

capacitor by a factor of slightly more than

√2, for PWM duty-cycles > 50% as derived from following Erickson’s

method [2].

The PWM frequency and maximum duty-cycle clamps for both GDx outputs of the UCC28070 are set through

the selection of the resistors connected to the RT and DMAX pins, respectively. The selection of the RT resistor

Copyright © 2007, Texas Instruments Incorporated

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