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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCAL9722HNMP датащи(PDF) 7 Page - NXP Semiconductors |
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PCAL9722HNMP датащи(HTML) 7 Page - NXP Semiconductors |
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7 / 63 page  NXP Semiconductors PCAL9722 Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and reset Symbol Pin Type Description P1_5 [2] 14 I/O Port 1 input/output 5 P1_6 [2] 15 I/O Port 1 input/output 6 P1_7 [2] 16 I/O Port 1 input/output 7 P2_0 [3] 17 I/O Port 2 input/output 0 P2_1 [3] 18 I/O Port 2 input/output 1 P2_2 [3] 19 I/O Port 2 input/output 2 P2_3 [3] 20 I/O Port 2 input/output 3 P2_4 [3] 21 I/O Port 2 input/output 4 P2_5 [3] 22 I/O Port 2 input/output 5 CS 23 I SPI chip select input SDOUT 24 O SPI serial data output VSS 25 ground Supply ground ADDR 26 I Address input. Connect directly to VDD(SPI) or ground. VDD(P) 27 power supply Supply voltage of PCAL9722 for Port P RESET 28 I Active LOW reset input. Connect to VDD(SPI) through a pull-up resistor if no active connection is used. Table 3. Pin description...continued [1] Pins P0_0 to P0_7 correspond to bits P0.0 to P0.7. At power-on, all I/Os are configured as inputs. [2] Pins P1_0 to P1_7 correspond to bits P1.0 to P1.7. At power-on, all I/Os are configured as inputs. [3] Pins P2_0 to P2_5 correspond to bits P2.0 to P2.5. At power-on, all I/Os are configured as inputs. PCAL9722 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.1 — 1 May 2023 7 / 63 |
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