PCAL9722HNMP datasheet(22/63 Pages) NXP

22 / 63 page

NXP Semiconductors

PCAL9722

Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and

reset

requires an oscillator time base input and if this function is used, P0_0 is designated as the oscillator input. If

P0_0 is not configured as input and if SD0.0 is not set to logic 1, then switch debounce logic is not connected to

any pin. See Section 6.9 for additional information about Switch debounce logic functionality.

Bit

Symbol

SD0.7

SD0.6

SD0.5

SD0.4

SD0.3

SD0.2

SD0.1

SD0.0

Default

Table 57. Switch debounce enable Port 0 register (address 74h) bit description

Bit

Symbol

SD1.7

SD1.6

SD1.5

SD1.4

SD1.3

SD1.2

SD1.1

SD1.0

Default

Table 58. Switch debounce enable Port 1 register (address 75h) bit description

6.4.17 Switch debounce count register (76h)

The switch debounce count register is used to count the debounce time that the switch debounce logic uses

to determine if a switch connected to one of the Port 0 or Port 1 pins finally stays open (logic 1) or closed

(logic 0). This number, together with the oscillator frequency supplied to P0_0, determines the debounce time

(for example, the debounce time will be 10 μs if this register is set to 0Ah and external oscillator frequency is

1 MHz). See Section 6.9 for further information.

Bit

Symbol

SDC0.7

SDC0.6

SDC0.5

SDC0.4

SDC0.3

SDC0.2

SDC0.1

SDC0.0

Default

Table 59. Switch debounce count register (address 76h) bit description [1]

[1]

The switch debounce logic is disabled if this register is set to 00h.

6.5 I/O port

When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The

input voltage may be raised above VDD(P) to a maximum of 5.5 V.

If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the Output port register.

In this case, there are low-impedance paths between the I/O pin and either VDD(P) or VSS. The external voltage

applied to this I/O pin should not exceed the recommended levels for proper operation.

PCAL9722

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.1 — 1 May 2023

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