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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 220 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 220 Page - Freescale Semiconductor, Inc |
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220 / 1350 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.17 220 Freescale Semiconductor Operation RS1 & RS2 ⇒ RD RD & IMM16 ⇒ RD (translates to ANDL RD, #IMM16[7:0]; ANDH RD, #IMM16[15:8]) Performs a bit wise logical AND of two 16 bit values and stores the result in the destination register RD. Remark: There is no complement to the BITH and BITL functions. This can be imitated by using R0 as a destination register. AND R0, RS1, RS2 performs a bit wise test without storing a result. CCR Effects Code and CPU Cycles AND Logical AND AND NZ V C ∆∆ 0— N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. Refer to ANDH instruction for #IMM16 operations. V: 0; cleared. C: Not affected. Source Form Address Mode Machine Code Cycles AND RD, RS1, RS2 TRI 0 0 0 1 0 RD RS1 RS2 0 0 P AND RD, #IMM16 IMM8 1 0 0 0 0 RD IMM16[7:0] P IMM8 1 0 0 0 1 RD IMM16[15:8] P |
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