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SC312XDP512F0MPVR датащи(PDF) 218 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 218 Page - Freescale Semiconductor, Inc |
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218 / 1350 page ![]() Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.17 218 Freescale Semiconductor Operation RD + IMM8:$00 ⇒ RD Adds the content of high byte of register RD and a signed immediate 8 bit constant using binary addition and stores the result in the high byte of the destination register RD. This instruction can be used after an ADDL for a 16 bit immediate addition. Example: ADDL R2,#LOWBYTE ADDH R2,#HIGHBYTE ; R2 = R2 + 16 bit immediate CCR Effects Code and CPU Cycles ADDH Add Immediate 8 bit Constant (High Byte) ADDH NZ V C ∆∆∆∆ N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. V: Set if a two´s complement overflow resulted from the operation; cleared otherwise. RD[15]old & IMM8[7] & RD[15]new | RD[15]old & IMM8[7] & RD[15]new C: Set if there is a carry from the bit 15 of the result; cleared otherwise. RD[15]old & IMM8[7] | RD[15]old & RD[15]new | IMM8[7] & RD[15]new Source Form Address Mode Machine Code Cycles ADDH RD, #IMM8 IMM8 1 1 1 0 1 RD IMM8 P |
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