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ST7GEME4 датащи(PDF) 16 Page - STMicroelectronics |
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ST7GEME4 датащи(HTML) 16 Page - STMicroelectronics |
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16 / 28 page ![]() Electrical characteristics ST7GEME4 16/28 4.3 Supply and reset characteristics Table 11 characteristics are measured at T = 0 to +70 oC, VDD - VSS = 5.5 V unless otherwise specified. 4.4 Clock and timing characteristics 4.4.1 General timings Table 12 characteristics are measured at T = 0 to +70 oC unless otherwise specified. Table 10. LED pins characteristics Symbol Parameter Conditions Min Typ Max Unit ILsink Low current VPAD > VDD-2.4 2 4 mA ILsink High current VPAD > VDD-2.4 for ROM 5 6 8.4 Table 11. Low voltage detector and supervisor characteristics (LVDS) Symbol Parameter Conditions Min Typ Max Unit VIT+ Reset release threshold (VDD rising) 3.7 3.9 V VIT- Reset generation threshold (VDD falling) 3.3 3.5 V Vhys Hysteresis VIT+ - VIT- (1) 1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 200 mV VtPOR VDD rise time rate 1) 20 ms/V Table 12. General timings Symbol Parameter Conditions Min Typ(1) 1. Data based on typical application software. Max Unit tc(INST) Instruction cycle time 23 12 tCPU fCPU=4 MHz 500 750 3000 ns tv(IT) Interrupt reaction time(2) tv(IT) = ∆tc(INST) + 10 (3) 2. Time measured between interrupt event and interrupt vector fetch. ∆t c(INST) is the number of tCPU cycles needed to finish the current instruction execution. 3. ∆t INST is the number of tCPU to finish the current instruction execution. 10 22 tCPU fCPU=4 MHz 2.5 5.5 µs |
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