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HT86R192 датащи(PDF) 15 Page - Holtek Semiconductor Inc

номер детали HT86R192
подробное описание детали  Voice Synthesizer 8-Bit OTP MCU
PDF  44 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
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HT86R192 датащи(HTML) 15 Page - Holtek Semiconductor Inc

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HT86R192
Rev. 0.00
15
October 23, 2006
Preliminary
The HT86R192 provides two types of oscillator circuit
for the system clock, i.e., RC oscillator and crystal oscil-
lator. No matter what type of oscillator, the signal is used
for the system clock. The HALT mode stops the system
oscillator and ignores external signal to conserve power.
If the RC oscillator is used, an external resistor between
OSC1 and VSS is required, and the range of the resis-
tance should be from 155k
W to 300kW. The system
clock, divided by 4, is available on OSC2 with pull-high
resistor, which can be used to synchronize external
logic. The RC oscillator provides the most cost effective
solution. However, the frequency of the oscillation may
vary with VDD, temperature, and the chip itself due to
process variations. It is therefore not suitable for timing
sensitive operations where accurate oscillator fre-
quency is desired.
On the other hand, if the crystal oscillator is selected, a
crystal across OSC1 and OSC2 is needed to provide the
feedback and phase shift required for the oscillator, and
no other external components are required. A resonator
may be connected between OSC1 and OSC2 to replace
the crystal and to get a frequency reference, but two ex-
ternal capacitors in OSC1 and OSC2 are required.
There is another oscillator circuit designed for Timer3
¢s
clock source as the RTC time base which is determined
by OTP option. If the OTP option determines that
Timer3
¢s clock source is from a 32kHz crystal, then a
32kHz crystal should be connected to XIN and XOUT.
Watchdog Timer
- WDT
The WDT clock source is implemented by a dedicated
RC oscillator (WDT oscillator) or instruction clock (sys-
tem clock divided by 4), decided by OTP options. This
timer is designed to prevent a software malfunction or
sequence jumping to an unknown location with unpre-
dictable results. The Watchdog Timer can be disabled
C r y s t a l O s c i l l a t o r
R C O s c i l l a t o r
O S C 1
O S C 2
O S C 2
f S Y S / 4
O S C 1
V D D
R T C O s c i l l a t o r
X O U T
X I N ( P C 6 )
System Oscillator
S y s t e m C l o c k / 4
8 - b i t C o u n t e r
W D T P r e s c a l e r
7 - b i t C o u n t e r
8 - t o - 1 M U X
W D T T i m e - o u t
W S 0 ~ W S 2
M a s k
O p t i o n
S e l e c t
W D T
O S C
Watchdog Timer
Bit No.
Label
Function
0
EMI
Controls the master (global) interrupt (1= enabled; 0= disabled)
1
EEI
Controls the external interrupt (1= enabled; 0= disabled)
2
ET0I
Controls the Timer 0 interrupt (1= enabled; 0= disabled)
3
ET1I
Controls the Timer 1 interrupt (1= enabled; 0= disabled)
4
EIF
External interrupt request flag (1= active; 0= inactive)
5
T0F
Timer 0 request flag (1= active; 0= inactive)
6
T1F
Timer 1 request flag (1= active; 0= inactive)
7
¾
Unused bit, read as
²0²
INTC (0BH) Register
Bit No.
Label
Function
0
ET2I
Controls the Timer 2 interrupt (1= enabled; 0= disabled)
1
ET3I
Controls the Timer 3 interrupt (1= enabled; 0= disabled)
2~3, 6~7
¾
Unused bit, read as
²0²
4
T2F
Timer 2 interrupt request flag (1= active; 0= inactive)
5
T3F
Timer 3 interrupt request flag (1= active; 0= inactive)
INTCH (1EH) 1 Register



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