HT36B2 datasheet(8/39 Pages) HOLTEK

8 / 39 page

HT36B2

Rev. 1.10

March 10, 2005

Wavetable ROM

The ST15~0 is used to defined the start address of each

sample on the wavetable and read the waveform data

from the location. HT36B2 provides 21 output address

lines from WA16~0, the ST15~0 is used to locate the

major 16 bits of 21 lines and the undefined data from

WA4~0 is always set to 00000b. So the start address of

each sample have to be located at a multiple of 32

bytes. Otherwise, the sample will not be read out cor-

rectly because it has a wrong starting code.

Stack Register

- Stack

This is a special part of the memory which is used to

save the contents of the program counter (PC) only. The

stack is organized into 8 levels and is neither part of the

data nor part of the program space, and is neither read-

able nor writeable. The activated level is indexed by the

stack pointer (SP) and is neither readable nor writeable.

At a subroutine call or interrupt acknowledge, the con-

tents of the program counter are pushed onto the stack.

At the end of a subroutine or an interrupt routine, sig-

naled by a return instruction (RET or RETI), the program

counter is restored to its previous value from the stack.

After a chip reset, the SP will point to the top of the stack.

If the stack is full and a non-masked interrupt takes

place, the interrupt request flag will be recorded but the

acknowledge will be inhibited. When the stack pointer is

decremented (by RET or RETI), the interrupt will be ser-

viced. This feature prevents stack overflow allowing the

programmer to use the structure more easily. In a similar

case, if the stack is full and a CALL is subsequently exe-

cuted, a stack overflow occurs and the first entry will be

lost (only the most recent eight return address are

stored).

Data Memory

- RAM

The data memory is designed with 3

´256´8 bits. The

data memory is divided into three functional groups:

special function registers, wavetable function register,

and general purpose data memory (3

´192´8). Most of

them are read/write, but some are read only.

The special function registers include the Indirect Ad-

dressing register 0/1 (00H/02H), the Memory Pointer

pointer (BP;01H), the 8-bit MCU accumulator

(ACC;05H), the Program Counter Lower-byte register

(PCL;06H), the Table Pointer (TBLP;07H), the Table

Higher-order byte register (TBLH;08H), the Watchdog

Timer option Setting register (WDTS;09H), the Status

(INTC;0BH), the Timer/Event Counter 0 Higher-order

byte register (TMR0H;0CH), the Timer/Event Counter 0

Lower-order byte register (TMR0L;0DH), the

Timer/Event Counter 0 Control register (TMR0C;0EH),

the Timer/Event Counter 1 Higher-order byte register

(TMR1H;0FH), the Timer/Event Counter 1 Lower-order

byte register (TMR1L;10H), the Timer/Event Counter 1

Control register (TMR1C;11H), the I/O registers

(PA;12H, PB;14H, PC;16H, PD;18H), the program ROM

bank select (PF;1CH)), the D/A converter (DAH;1DH,

DAL;1EH, DAC;1FH) and the I/O Control registers

(PAC;13H, PBC;15H, PCC;17H, PDC;19H). The

wavetable function register is defined between

20H~2AH. The remaining space before the 40H is re-

served for future expansion usage and reading these lo-

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

2 0 H

2 1 H

2 2 H

2 3 H

2 4 H

2 5 H

2 6 H

2 7 H

2 9 H

2 A H

2 B H

3 F H

2 8 H

S p e c i a l P u r p o s e

D a t a M e m r o y

W a v e t a b l e

F u n c t i o n

R e g i s t e r

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

B P

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C

T M R 0 H

T M R 0 L

T M R 0 C

T M R 1 H

T M R 1 L

T M R 1 C

P A

P A C

P B

P B C

P C

P C C

P D

P D C

P F

D A C H i g h B y t e ( D A H )

D A C L o w B y t e ( D A L )

D A C C o n t r o l ( D A C )

C h a n n e l N u m b e r S e l e c t ( C H A N )

F r e q u e n c y N u m b e r H i g h B y t e ( F r e q N H )

F r e q u e n c y N u m b e r L o w B y t e ( F r e q N L )

S t a r t A d d r e s s H i g h B y t e ( A d d r H )

S t a r t A d d r e s s L o w B y t e ( A d d r L )

R e p e a t N u m b e r H i g h B y t e ( R e H )

R e p e a t N u m b e r L o w B y t e ( R e L )

C o n t r o l R e g i s t e r ( E N V )

L e f t V o l u m e C o n t r o l ( L V C )

R i g h t V o l u m e C o n t r o l ( R V C )

: U n u s e d .

R e a d a s " 0 0 "

F F H

4 0 H

G e n e r a l P u r p o s e

D a t a M e m o r y

( 1 9 2

´ 3 B y t e s )

B a n k 0

B a n k 1

B a n k 2

0 C H

RAM Mapping

HT36B2 датащи(PDF) 8 Page - Holtek Semiconductor Inc

HT36B2 датащи(HTML) 8 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

датащи скачать

ссылки URL