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P89V52X2FN датащи(PDF) 45 Page - NXP Semiconductors |
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P89V52X2FN датащи(HTML) 45 Page - NXP Semiconductors |
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45 / 56 page ![]() P89V52X2_1 © NXP B.V. 2007. All rights reserved. Preliminary data sheet Rev. 01 — 7 June 2007 45 of 56 NXP Semiconductors P89V52X2 80C51 with 256 B RAM, 192 B data EEPROM 9.1 Explanation of symbols Each timing symbol has 5 characters. The first character is always a ‘t’ (stands for time). The other characters, depending on their positions, stand for the name of a signal or the logical status of that signal. The following is a list of all the characters and what they stand for. A — Address C — Clock D — Input data H — Logic level HIGH I — Instruction (program memory contents) L — Logic level LOW or ALE P — PSEN Q — Output data R — RD signal T — Time V — Valid W — WR signal X — No longer a valid logic level Z — High impedance (Float) Example: tAVLL = Address valid to ALE LOW time tLLPL = ALE LOW to PSEN LOW time Fig 21. External program memory read cycle 002aaa548 port 2 PSEN ALE A0 to A7 tLLAX tPLAZ tPXIZ tLLPL tAVIV tAVLL tLLIV tPLIV tPLPH INSTR IN A8 to A15 A8 to A15 A0 to A7 port 0 tPXIX tPXAV tLHLL |
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