P89V52X2FN datasheet(39/56 Pages) PHILIPS

39 / 56 page

P89V52X2_1

Preliminary data sheet

Rev. 01 — 7 June 2007

39 of 56

NXP Semiconductors

P89V52X2

80C51 with 256 B RAM, 192 B data EEPROM

for (i=0;i<64;i=i+1)

{

FMDATA = dbytes[i];

}

FMCON = EP; //erase & prog page command

Fm_stat = FMCON; //read the result status

if ((Fm_stat & 0x0F)!=0) prog_fail=1; else prog_fail=0;

return(prog_fail);

}

6.13.7 Data EEPROM write enable

The data EEPROM has a Write Enable mechanism to help prevent against inadvertent

writes. If the WE bit (FMCON.6) is set writes to the data EEPROM are enabled. When

cleared, writes are disabled. This bit only affects execution mode. The WE bit is set when:

• The disable write enable bit, DISWE (UCFG.2) = 1

• In ICP mode

• The SET_WE (08H) command is written to FMCON followed by the key value (96H)

being written to FMDATA

The WE bit is cleared following any reset. The WE bit may also be cleared by writing the

CLR_WE (0BH) command to FMCON.

6.13.8 Data EEPROM security bits

The data EEPROM security bits protects each data EEPROM page. The data EEPROM

page security bits and their effects are shown in Table 35.

6.13.9 Summary of data EEPROM commands

is a summary of the FMCON commands related to the data EEPROM.

Table 35.

DPxSEC - Data page X security register bit allocation

Bit

Symbol

---

XERSx

PWRx

MOVCx

Table 36.

DPxSEC - Data page X security register bit description

Bit

Symbol

Description

7 to 3

Reserved

XERSx

Execution Erase Protect x. When programmed = 1, cannot be erased

with ERS_DP command in execution mode. ERS_DP can be used in

ICP mode.

PWRx

Page Write Protect x. When programmed = 1, data EEPROM cannot

be erased or programmed using PROG or EP commands.

MOVCx

When programmed = 1, prevents instructions fetched from off-chip

from reading the contents of the data EEPROM and returns FFH.

CRC_DP are disabled if the corresponding Page Write Protect is

disabled.

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