MCP8021 datasheet(25/66 Pages) MICROCHIP

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DS20006265D-page 25

MCP8021/2

TABLE 4-1:

FAULTS

TABLE 4-2:

WARNINGS

4.5.4

POWER CONTROL STATUS (PCON)

The PCON[2:0] (STAT0[7:5]) bits are power control

status bits that may be used to determine the cause of a

shutdown. They are not Fault latches. The PCON power

status bits will contain the cause of the power cycle.

Table 4-3 lists the power status register bits in the STAT0

TABLE 4-3:

POWER STATUS

4.5.4.1

Internal Function Block Status

Table 4-4 shows the effects of the OE pin, Faults and

the SLEEP bit upon the functional status of the internal

blocks of the MCP8021/2.

4.5.4.2

Start-Up/FAULT Pin State

During device start-up or Power-on Reset (POR), the

FAULT pin will stay active (low) to indicate to the host

that the device is initializing. The FAULT pin will stay

active until the state machine powers up the VREG LDO

and completes the VREG state. After the VREG LDO is

powered up, the FAULT pin logic checks the state of all

of the latched FAULT bits. If any FAULT bit is still active,

the FAULT pin will stay active and remain low.

Fault

DE2 Message

Fault Active (‘OR’ of all Faults)

0x85 0x01

Overtemperature

0x85 0x04

VDD Input Undervoltage

0x85 0x08

VDD Input Overvoltage

0x85 0x10

VREG Output Undervoltage

0x86 0x01

External MOSFET Undervoltage

Lockout

0x86 0x04

External MOSFET Overcurrent

Detection

0x86 0x08

Fault

DE2 Message

Temperature Warning

0x85 0x02

PCON Status Bits [7:5]

DE2 Message

Overtemperature Shutdown

(OTSHDN) Occurred

0x85 0xA0

Sleep Occurred

0x85 0x60

VDD Undervoltage Shutdown

(UVSHDN) Occurred

0x85 0x40

Power-on Reset (POR) Occurred

0x85 0x20

Normal Operation

0x85 0x00

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