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PM7367 датащи(PDF) 292 Page - PMC-Sierra, Inc

номер детали PM7367
подробное описание детали  FRAME ENGINE AND DATA LINK MANAGER
PDF  323 Pages
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производитель  PMC [PMC-Sierra, Inc]
домашняя страница  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7367 датащи(HTML) 292 Page - PMC-Sierra, Inc

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PM7367 FREEDM-32P32
DATA SHEET
PMC-1991499
ISSUE 2
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
278
All 8 framers in the TOCTAL should be programmed to operate in “Clock Master:
NxDS0” mode in both the ingress and egress direction.
12.3 JTAG Support
The FREEDM-32P32 supports the IEEE Boundary Scan Specification as
described in the IEEE 1149.1 standards. The Test Access Port (TAP) consists of
the five standard pins, TRSTB, TCK, TMS, TDI and TDO used to control the TAP
controller and the boundary scan registers. The TRSTB input is the active low
reset signal used to reset the TAP controller. TCK is the test clock used to
sample data on input, TDI and to output data on output, TDO. The TMS input is
used to direct the TAP controller through its states. The basic boundary scan
architecture is shown below.
Figure 20 – Boundary Scan Architecture
Boundary Scan
Register
Control
TDI
TDO
Device Identification
Register
Bypass
Register
Instruction
Register
and
Decode
TRSTB
TMS
TCK
Test
Access
Port
Controller
Mux
DFF
Select
Tri-state Enable



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